Comparison of 6T and 8T SRAM Cell with Parameters at 45 nm Technology
Static random access memory (SRAM) plays a most significant role in the microprocessor world, but as the technology is scaled down in nanometers, leakage current, leakage power and delay are the most common problems for SRAM cell which is basically designed in low power application. In this paper we compares the performance, working and simulation results of two different SRAM cell methods i.e. Conventional six transistor SRAM cell and proposed eight transistor SRAM cell Designing of 8T SRAM cell is done due to high speed operation. By simulating and performing operations we confirmed that our proposed conventional 8T SRAM cell has amend their parameters. During write operation of 8T SRAM cell gives leakage current is 69 pA, leakage power is 7.581 nW and delay is 20.55 ns and for read operation of leakage current is 53.90 pA, leakage power is 1.709 µW and delay is 21.44 ns and SNM of 8T SRAM Cell has greater stability by 29 % as compared to 6T SRAM.
KeywordsLeakage Current Read Operation Leakage Power NMOS Transistor PMOS Transistor
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