Modeling and Analysis of FinFET Based Schmitt Trigger with Stability Response and Gain-Bandwidth Product
Schmitt Trigger (ST) plays a vital role in analog circuit whose tremendous use in today’s VLSI design has enlightened the implementation of ultra low power ST design. Power consumption and delay is needed to be minimized for better performance of CMOS analog circuits. FinFET structure greatly contributes to decreases leakage power due to fin configuration. In this paper FinFET based ST is represented which suggest good noise response, gain bandwidth product and slew rate. Our design has obtain considerable reduced leakage power of 0.9 pW with delay of 264 ps for a sine wave of frequency 1 GHz by implementing Adaptive voltage level technique and obtain power dissipation of 1.636 mW at 0.7 V supply. Various performance parameters of the circuit have been evaluated with cadence virtuoso design tool at 45 nm FinFET implemented in independent gate mode (IG). After simulation a comparative analysis is carried with previous published 4T ST at 45 nm along with the proposed design and evaluate results. This work reduces delay and leakage power considerably as FinFET based ST offers delay and leakage power reduction of 37.38 and 75.15 % respectively at 0.7 V power supply. The slew rate of this design is 6.492 V/ps at 229.6 ps is obtained at 0.7 V.
KeywordsPower Dissipation Slew Rate Leakage Power Standby Mode Schmitt Trigger
We would like to thanks ITM University and cadence design system, Bangalore for their supports to our work.
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