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Part of the book series: Signals and Communication Technology ((SCT))

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Abstract

The structure of a Digital Phase-Locked Loop (DPLL)-based systems for dealing with Nakagami-m fading is proposed in this chapter. The emphasis of the work is the implementation of the essential components of a DPLL for better reception of signals with certain modulation transmitted through Nakagami-m channels. A sixth order polynomial fitting algorithm for better phase-frequency detection has been implemented, which has helped to attain optimum performance of DPLL. The results of simulation of the proposed DPLL with Nakagami-m fading and QPSK modulation shows that the proposed method provides better performance than existing systems of similar type.

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Correspondence to Basab Bijoy Purkayastha .

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© 2015 Springer India

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Purkayastha, B.B., Sarma, K.K. (2015). A Zero-Crossing Algorithm-Based Digital Phase-Locked Loop. In: A Digital Phase Locked Loop based Signal and Symbol Recovery System for Wireless Channel. Signals and Communication Technology. Springer, New Delhi. https://doi.org/10.1007/978-81-322-2041-1_7

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  • DOI: https://doi.org/10.1007/978-81-322-2041-1_7

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  • Publisher Name: Springer, New Delhi

  • Print ISBN: 978-81-322-2040-4

  • Online ISBN: 978-81-322-2041-1

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