Abstract
In this chapter, we focus on various software optimization techniques to reduce power consumption without any change in the underlying hardware. A power-aware software will not require any additional hardware, but will perform suitable optimization of software. Software optimization techniques can be broadly classified into two categories: machine-independent and machine-dependent. Machine-independent optimization techniques do not require any knowledge of the hardware architecture of the processor and can be used for any processor. Instead of the traditional compiler optimization techniques commonly used to reduce the execution time, optimization can be performed to reduce the power consumption keeping the computation time same. On the other hand, the machine-dependent optimization techniques exploit the architectural features of the target processor and the hardware platform.
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Tewari, V., Malik, S., Wolfe, A.: Compilation techniques for low energy. In: The Proceedings of 1994 Symposium on Low-Power Electronics, San Diego, CA, October 1994
Mowry, T.C.: Tolerating latency through software-controlled data prefetching. Doctor dissertation, Standford University, March 1994
Deepak, N.A., Sumitkumar, N.P., Gang, Q., Donald, Y.: Transferring performance gain from software prefetching to energy reduction. In: Proceedings of the 2004 International Symposium on Circuits and Systems (ISCAS2004), Vancouver, Canada
Xie, F., Martonosi, M., Malik, S.: Intraprogram dynamic voltage scaling: Bounding opportunities with analytic modeling. ACM Trans. Architecture Code Optimization 1(3), 323–367 (2004)
Chen, J., Dong, Y., Yi, H., Yang, X.: Power-aware software prefetching. ICESS 2007, LNCS 4523, pp. 207–218
Mowry, T.C., Lam, S., Gupta, A.: Design and evaluation of a compiler algorithm for prefetching. In: Proceedings of 5th International Conference on Architectural Support for Programming Languages and Operating Systems, Boston, MA, pp. 62–73, September 1992
Klaiber, A.C., Levy, H.M.: An architecture for software-controlled data prefetching. In: Proceedings of the 18th International Symposium on Computer Architecture, Toronto, ON, Canada, pp. 43–53, May 1991
Herczeg, Z., Kiss, A., Schmidt, D., Wehn, N., Gyimothy, T.: XEEMU: An improved XScale power simulator. PATMOS 2007, LNCS 4644, pp. 300–309
Herczeg, Z., Kiss, A., Schmidt, D., Wehn, N., Gyimothy, T.: Energy simulation of embedded XScale systems with XEEMU. J. Embedded Comput. – PATMOS 2007 selected papers on low power electronics archive, vol. 3, issue 3, August 2009
Hamdy, A.T.: Operations Research: An Introduction, 8th edn., Chap. 8, p. 338. PHI Learning Private Limited
Hamdy, A.T.: Operations Research: An Introduction, 8th edn., Chap. 3, p. 90. PHI Learning Private Limited
Sakurai, T., Newton, A.: Alpha-power model, and its application to CMOS inverter delay and other formulas. IEEE J. Solid-State Circ. 25, 584–594 (1990)
Burd, T., Brodersen, R.: Design issues for dynamic voltage scaling. In: The Proceedings of International Symposium on Low Power Electronics and Design (ISLPED – 00), June 2000
Badawy, A.-H., Aggarwal, A., Yeung, D., Tseng C.-W.: The efficacy of software prefetching and locality optimizations on future memory systems. J. Instruct.-Level Parallel. 6 (2004)
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Pal, A. (2015). Low-Power Software Approaches. In: Low-Power VLSI Circuits and Systems. Springer, New Delhi. https://doi.org/10.1007/978-81-322-1937-8_12
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DOI: https://doi.org/10.1007/978-81-322-1937-8_12
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