Abstract
Chapter 5 introduces the NMOS inverter circuit based on QDGFETs. The three-state behavior of QDGFET also generates three states in the NMOS inverter based on this FET. The three-state nature of QDGFET-based NMOS inverter will help to implement multivalued logic in future. This chapter discusses the detailed fabrication methods of NMOS inverter.
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References
Kruppa, W., Boos, J. B.: Observation of DC and microwave negative differential resistance in InAlAs/InGaAS/InP HEMTs. Electron. Lett. 38(3), 267–269 (1992)
Chumbes, E.M., Schremer, A.T., Smart, J.A., Wang, Y., MacDonald, N.C., Hogue, D., Komiak, J.J., Lichwalla, S.J., Leoni, R.E., Shealy, J.R.: AlGaN/GaN high electron mobility transistors on Si(111) substrates. IEEE Trans. Electron Devices 48(3), 420–425 (2001)
Jain, F.C., Suarez, E., Gogna, M., AlAmoody, F., Butkiewicus, D., Hohner, R., Liaskas, T., Karmakar, S., Chan, P.Y., Miller, B., Chandy, J., Heller, E.: Novel quantum dot gate FETs and nonvolatile memories using lattice-matched II–VI gate insulators. J. Electron. Mater. 38(8), 1574–1578 (2009)
Karmakar, S., Gogna, M., Suarez, E., Alamoody, F., Heller, E., Chandy, J., Jain, F.: 3-state behavior of quantum dot gate FETs with lattice matched insulator. In: Proceedings of 2009 Nanoelectronic Devices for Defense and Security, Fort Lauderdale, Florida, USA, Sept 2009
Jain, F., Karmakar, S., Alamoody, F., Suarez, E., Gogna, M., Chan, P.-Y., Chandy, J., Miller, B., Heller, E.: 3-state behavior in quantum dot gate InGaAs FETs. In: Proceedings of International Semiconductor Device Research Symposium, College Park, MD, USA, Dec 2009
Jain, F.C., Heller, E., Karmakar, S., Chandy, J.: Device and circuit modeling using novel 3-state quantum DOT gate FETs. In Proceedings of International Semiconductor Device Research Symposium, College Park, MD, USA, Dec 2007
Chandy, J.A., Jain, F.C.: Multiple valued logic using 3-state quantum dot gate FETs. In: Proceedings of International Symposium on Multiple Valued Logic, Dallas, Texas, USA, 08
Karmakar, S., Suresh, A.P., Chandy, J.A., Jain, F.C.: Design of ADCs and DACs using 3-state quantum DOT gate FETs. In: Proceedings of International Semiconductor Device Research Symposium, College Park, MD, USA, Dec 2009
Karmakar, S., Chandy, J.A., Gogna, M., Jain, F.C.: Fabrication and Circuit modeling of NMOS inverter based on quantum dot gate field effect transistors. J. Electron. Mater. 41(8), 2184–2192 (2012). doi:10.1007/s11664-012-2116-4
Gogna, M., Al-Amoody, F., Karmakar, S., Papadimitrakopoulos, F., Jain, F.: Quantum Dot (QD) gate Si-FETs with self-assembled GeOX Cladded Germanium Quantum Dots. In: Nanotech 2009 Conference, Houston, TX, USA, 1, 163–165
Jain, F., Alamoody, F., Suarez, E., Gogna, M., Chan, P.-Y., Karmakar, S., Fikiet, J., Miller, B., Heller, E.: Quantum dot gate InGaAs FETs. In: Nanotech 2009 Conference, Houston, TX, USA, 1, 598–601
Papadimitrakopoulos, F., Phely-Bobin, T., Wisniecki, P.: Self-assembled nanosilicon/siloxane composite films. Chem. Mater. 11(3), 522–525 (1999)
Phely-Bobin, T., Chattopadhyay, D., Papadimitrakopoulos, F.: Characterization of mechanically attrited Si/SiOx nanoparticles and their self-assembled composite films. Chem. Mater. 14(3), 1030–1036 (2002)
Jain, F.C., Papadimitrakopoulos, F.: US Patent 7,368,370, 2008
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Karmakar, S. (2014). Quantum Dot Gate NMOS Inverter. In: Novel Three-state Quantum Dot Gate Field Effect Transistor. Springer, New Delhi. https://doi.org/10.1007/978-81-322-1635-3_5
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DOI: https://doi.org/10.1007/978-81-322-1635-3_5
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