Abstract
Matrix multiplication requires a large number of operations, demanding for high performance computing. In order to complete the matrix multiplication in one clock cycle, a designer can utilize multiple multipliers. However, this approach is inefficient in terms of hardware area and power consumption. Therefore, it is important to find out the way to complete the multiplication that is fast and uses hardware resources properly. In this paper, we introduce the way to reduce the number of multipliers and provide the hardware overhead and performance of matrix multiplication on FPGA.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Strassen V (1969) Gaussian elimination is not optimal. Numer Math 13:354–356
Choi J (1997) A fast scalable universal matrix multiplication algorithm on distributed-memory concurrent computers. In: Proceedings of the 11th international symposium on parallel processing
Bensaali F, Amira A, Bouridane A (2005) Accelerating matrix product on reconfigurable hardware for image processing applications, circuits, devices and systems. In: IEEE Proceedings 3 June 2005
Lin CY (2011) A model for matrix multiplication performance on FPGAs. In: 21st international conference on field programmable logic and applications
Al-Qadi Z, Aqel M (2009) Performance analysis of parallel matrix multiplication algorithms used in image processing. World Appl Sci J
Acknowledgments
This study was supported by Seoul National University of Science and Technology, Korea.
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2013 Springer India
About this paper
Cite this paper
Lee, J.S., Kim, S.D., Jeong, Y.S., Lee, S.E. (2013). Hardware Overhead vs. Performance of Matrix Multiplication on FPGA. In: S, M., Kumar, S. (eds) Proceedings of the Fourth International Conference on Signal and Image Processing 2012 (ICSIP 2012). Lecture Notes in Electrical Engineering, vol 222. Springer, India. https://doi.org/10.1007/978-81-322-1000-9_28
Download citation
DOI: https://doi.org/10.1007/978-81-322-1000-9_28
Published:
Publisher Name: Springer, India
Print ISBN: 978-81-322-0999-7
Online ISBN: 978-81-322-1000-9
eBook Packages: EngineeringEngineering (R0)