Arithmetic Circuits Designs

Part of the SpringerBriefs in Electrical and Computer Engineering book series (BRIEFSELECTRIC)


The algorithms for arithmetic operations in CBNS, described in the previous chapter, have been implemented in computer hardware using Field Programmable Gate Arrays (FPGAs). This chapter includes design information for a nibble-size (four bits) adder, subtractor, multiplier, and divider circuits utilizing CBNS for representation of complex numbers. The implementation and performance statistics related to these circuits are also presented.


Field Programmable Gate Array Memory Location Truth Table Memory Bank Column Number 


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Copyright information

© The Author(s) 2013

Authors and Affiliations

  1. 1.Department of Electrical and Computer EngineeringSultan Qaboos UniversityMuscatOman

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