Arithmetic Circuits Designs

  • Tariq Jamil
Part of the SpringerBriefs in Electrical and Computer Engineering book series (BRIEFSELECTRIC)


The algorithms for arithmetic operations in CBNS, described in the previous chapter, have been implemented in computer hardware using Field Programmable Gate Arrays (FPGAs). This chapter includes design information for a nibble-size (four bits) adder, subtractor, multiplier, and divider circuits utilizing CBNS for representation of complex numbers. The implementation and performance statistics related to these circuits are also presented.


Field Programmable Gate Array Memory Location Truth Table Memory Bank Column Number 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


  1. 1.
    T. Jamil, B. Arafeh, A. AlHabsi, Design of nibble-size adder for (−1+j)-base complex binary numbers. Proc. World Multiconference Syst. Cybern. Inform. 5, 297–302 (2002)Google Scholar
  2. 2.
    B. Arafeh, T. Jamil, A. AlHabsi, A nibble-size ripple-carry adder for (−1 + j)-base complex binary numbers. Proc. Int. Arab Conf. Inform. Technol. 1, 207–211 (2002)Google Scholar
  3. 3.
    T. Jamil, B. Arafeh, A. AlHabsi, Hardware implementation and performance evaluation of complex binary adder designs. Proc. World Multiconference Syst. Cybernet. Inform. 2, 68–73 (2003)Google Scholar
  4. 4.
    J. Goode, T. Jamil, D. Callahan, A simple circuit for adding complex numbers. WSEAS Trans. Informa. Sci. Appl. 1(1), 61–66 (2004)Google Scholar
  5. 5.
    T. Jamil, Design of arithmetic circuits for complex binary number system. J. Am. Inst. Phys. IAENG Trans. Eng. Technol. 1373(1), 83–97 (2011)Google Scholar
  6. 6.
    T. Jamil, A. Abdulghani, A. AlMaashari, Design of a nibble-size subtractor for (−1 + j)-base complex binary numbers. WSEAS Trans Circuits Syst 3(5), 1067–1072 (2004)Google Scholar
  7. 7.
    T. Jamil, A. AlMaashari, A. Abdulghani, Design and implementation of a nibble-size multiplier for (−1 + j)-base complex binary numbers. WSEAS Trans Circuits Syst 4(11), 1539–1544 (2005)Google Scholar
  8. 8.
    T. Jamil, S. AlAbri, Design of a divider circuit for complex binary numbers. Proc World Congr Eng Comp Sci II, 832–837 (2010)Google Scholar

Copyright information

© The Author(s) 2013

Authors and Affiliations

  1. 1.Department of Electrical and Computer EngineeringSultan Qaboos UniversityMuscatOman

Personalised recommendations