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VLSI Architecture of Spread Sprectrum Image Watermarking Decoder

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Proceedings of International Conference on Advances in Computing

Part of the book series: Advances in Intelligent Systems and Computing ((AISC,volume 174))

Abstract

Multifarious techniques have been adopted in the field of image watermarking which offers some desirable characteristics to the watermarked image. In this paper, the combined technique of channel coding and Spread Spectrum modulation has been exerted to implement the proposed image watermarking algorithm. A block based spatial domain watermarking scheme for digital image using Spread Spectrum has been employed for the implementation of the algorithm. In practice, with the help of pseudo random noise the binary watermark image has been distributed using channel coding and spatial bi-phase modulation technique. With the extensive use of Spread spectrum modulation technique the security issues related to image watermarking can be effectively dealt with, and at the same time robustness and imperceptibility of watermarked image can be enhanced appreciably. VLSI implementation using Field Programmable Gate Array (FPGA) has been developed the decoding portions of the algorithm.

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Correspondence to Navonil Chatterjee .

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© 2013 Springer India

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Chatterjee, N., Sohid, M., Chakraborty, S. (2013). VLSI Architecture of Spread Sprectrum Image Watermarking Decoder. In: Kumar M., A., R., S., Kumar, T. (eds) Proceedings of International Conference on Advances in Computing. Advances in Intelligent Systems and Computing, vol 174. Springer, New Delhi. https://doi.org/10.1007/978-81-322-0740-5_77

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  • DOI: https://doi.org/10.1007/978-81-322-0740-5_77

  • Publisher Name: Springer, New Delhi

  • Print ISBN: 978-81-322-0739-9

  • Online ISBN: 978-81-322-0740-5

  • eBook Packages: EngineeringEngineering (R0)

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