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A High Performance Graphic System for VLSI Design

  • Sumitsugu Inoue
  • Takashi Watanabe
  • Takayoshi Nakashima
Conference paper

Abstract

A high performance Graphic System for VLSI-CAD has been developed. A customized, 170k-gate, Graphic Processor (GP), the core component of the system, has high speed display functions with direct processing of primitives such as rectangles and cells without interpreting intermediate display formats. It supports high speed hardware editing functions and multi-user functions, with a large scale buffer memory.

The system has about 100 times, for display, and 1,000 times, for editing, as high performance as conventional graphic systems. For example, the display time of a 2,000-gate LSI (335K vectors) is about 3 seconds, all the editing times of the same LSI are shorter than 1 second, the display time of a 14,000-gate LSI (3.67M vectors) is about 25 seconds, and most of the editing times of the same LSI are shorter than 3 seconds.

Keywords

Layout Design Graphic System Host Computer Buffer Memory Display Time 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. (1).
    W.M.Newman and R.F.Sproull “Principles of Interactive Computer Graphics” Chapter 5 page 65, 1979 McGRAW-HILLGoogle Scholar
  2. (2).
    S.Inoue “High speed clipping algorithm for graphic display”, 1981 All Japan Electronic Communication Society Convention Record (in Japanese).Google Scholar
  3. (3).
    T.Takeda, et.al. “High performance Bipolar FPLAs”, Review of the Electrical Communication Laboratories Vol. 31 No. 4 1983Google Scholar

Copyright information

© Springer-Verlag Tokyo 1985

Authors and Affiliations

  • Sumitsugu Inoue
    • 1
  • Takashi Watanabe
    • 1
  • Takayoshi Nakashima
    • 1
  1. 1.N.T.T.Atsugi Electrical Communication LaboratoryAtsugi, KanagawaJapan

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