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New Trends in Graphic Display System Architecture

  • Ender M. Kaya
Conference paper

Abstract

This paper discusses a 4th generation graphics computing and display system. It defines the following as components of 4th generation graphics architecture: a combination of pipelined parallel coprocessors, custom VLSIs for vector drawing, bit slice and mathematics chips for geometry processing, a 32-bit VMEbus structure, and a new display list data structure. The paper shows how these components and modular architecture add high performance-to-cost effectiveness of raster-scan graphics display systems.

Keywords

Graphic System Host Computer Graphic Processor Screen Image Interprocessor Communication 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. 1.
    Tsuneo Ikedo, “High-Speed Techniques for the 3-D Color Graphic Terminal,” to appear in IEEE Computer Graphics and Applications, 1984.Google Scholar
  2. 2.
    Akira Fujimoto, C.G. Perrott, and Kansei Iwata, “3-D Color-Shaded Graphics Display with Depth Buffer and Pipeline Processor,” to appear in IEEE Computer Graphics and Applications, 1984.Google Scholar
  3. 3.
    Mary C. Whitton, “Memory Design for Raster Graphic Displays,” IEEE Computer Graphics and Applications, pp. 48 to 65, Vol. 4, No. 3, 1984.CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Tokyo 1985

Authors and Affiliations

  • Ender M. Kaya
    • 1
  1. 1.Ramtek CorporationSanta ClaraUSA

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