Tightly Coupled Multiprocessing: The Super Processor Architecture
Due to a number of fundamental hindrances, parallel computing has not yet become a practical general purpose technology comparable to current serial computing technology. Overcoming these hindrances is a major challenge that information society faces in the 21st century.
We advocate and explore a solution that departs from the strong reliance on the locality of data with respect to the individual processor. Under our approach, the multiprocessor is analogous, in fact, to a uniprocessor: The collection of processors acts as a single “super processor”, working under fine or medium granularity vis-a-vis a symmetric shared memory. An architectural/physical model of such a system is outlined, and a simple estimate for the clock frequency is given. The main novel part of the proposed “super processor” is a high flow-rate synchronizer/scheduler, which coordinates the parallel work. The macro architecture of the synchronizer/scheduler and the micro architecture of its critical component are described. The proposed architectural solution points to secondary, technological, challenges.
KeywordsShared Memory Distribution Network Clock Cycle Interconnection Network Tight Coupling
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