Zusammenfassung
Verschiedene lokale Oxidationstechniken werden hinsichtlich der erreichbaren Planarität analysiert. Anschließend folgen die Integration von Spacer- und LDD-Strukturen zur Reduktion von Kurzkanaleffekten. Die Schaltungsintegration in SOI-Technik einschließlich der Substratherstellung wird vorgestellt. Nanometer-Transistoren und FINFET-Strukturen runden das Kapitel ab.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Literatur
Ruge: Halbleiter-Technologie, Reihe Halbleiter-Elektronik, Bd. 4. Springer-Verlag, Berlin (1984)
Isomae, S., Yamamoto, S., Aoki, S., Yajma, A.: Oxidation-induced stress in a LOCOS structure. IEEE Electron Device Lett. 7, 368–370 (1986)
Kooi, E., van Lierop, J.G., Appels, J.A.: Formation of silicon nitride at a Si-SiO2 interface during local oxidation of silicon and during heat-treatment of oxidized silicon in NH3 gas. J. Electrochem. Soc. 123, 1117–1123 (1976)
Sakuma, K., Arita, Y., Doken, M.: A new self-aligned planar oxidation technology. J. Electrochem. Soc. 134, 1503–1507 (1987)
Hui, J.C., Chiu, T., Wong, S.S., Oldham, W.G.: Sealed interface local oxidation technology. IEEE Trans. Electron Devices 29, 554–561 (1982)
Chiu, K.Y., Moll, J.L., Manoliu, J.: A bird’s beak free local oxidation technology feasible for VLSI circuits fabrication. IEEE J. Solid-State Circuits 17, 166–170 (1982)
International Technology Roadmap for Semiconductors, 2011 Edition: http://www.itrs.net/Links/2011ITRS/2011Chapters/2011PIDS.pdf. Zugegriffen: 25. Sept. 2013
Jackson, K.A.: Processing of semiconductors. In: Cahn, R.W., Haasen, P., Kramer, E.J. (Hrsg.) Materials Science and Technology, Bd. 16. VCH-Verlag, Weinheim (1996)
Imai, K., Unno, H.: FIPOS (Full Isolation by Porous Oxidized Silicon) technology and its application to LSI’s. IEEE Trans. Electron Devices 31, 297–302 (1984)
Tong, Q.-T., Gösele, U.: Semiconductor Wafer Bonding. Wiley, New York (1999)
Momose, H.S., Ono, M., Yoshitomi, T., Ohguro, T., Makamura, S., Saito, M., Iwai, H.: 1.5 nm direct-tunneling gate oxide Si MOSFET’s. IEEE Trans. Electron Devices 43, 1233–1242 (1996)
Robertson, J.: High Dielectric Constant Oxides. EDP Sciences, Cambridge (2004)
Doering, R., Nishi, Y.: Semiconductor Manufacturing Technology. CRC Press LLC, Florida (2008)
Engström, O., Raeissi, B., Hall, S., Buiu, O., Lemme, M.C., Gottlob, H.D.B., Hurley, P.K., Cherkaoui, K.: Navigation aids in the search for future high-k dielectrics: physical and electrical trends. Solid-State Electron. 51, 622–626 (2007)
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
Copyright information
© 2014 Springer Fachmedien Wiesbaden
About this chapter
Cite this chapter
Hilleringmann, U. (2014). Erweiterungen zur Höchstintegration. In: Silizium-Halbleitertechnologie. Springer Vieweg, Wiesbaden. https://doi.org/10.1007/978-3-8348-2085-3_11
Download citation
DOI: https://doi.org/10.1007/978-3-8348-2085-3_11
Published:
Publisher Name: Springer Vieweg, Wiesbaden
Print ISBN: 978-3-8348-1335-0
Online ISBN: 978-3-8348-2085-3
eBook Packages: Computer Science and Engineering (German Language)