Building In Reliability. Is Statistical Process Control Statistical Reliability Control ?
This paper deals with the concept of using experimental design to verify the ideals of building in reliability in an integrated circuit fabrication process. The paper focuses on the gate oxide loop, which is one of the most critical steps in the process and uses a combination of a linear L12 Taguchi Array and Central Composite Face Centred Design experimental techniques to prove the Building In Reliability concept. The work will demonstrate that from a quality perspective many nodes are controlled in the process but only certain nodes have an impact on reliability. If these nodes are carefully controlled reliability can be maintained and indeed predicted possibly by using an expert system thus leading to “Statistical Reliability Control”.
KeywordsFailure Time Gate Oxide Statistical Process Control Total Distribution Gate Delay
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