Hierarchical Modeling for Monitoring Defects

  • Christina M. Mastrangelo
  • Naveen Kumar
  • David Forrest


In semiconductor manufacturing, discovering the processes that are attributable to defect rates is a lengthy and expensive procedure. This paper proposes a approach for understanding the impact of process variables on defect rates. By using a process-based hierarchical model, we can relate sub-process manufacturing data to layer-specific defect rates. This paper demonstrates a hierarchical modeling method using process data drawn from the Gate Contact layer, Metal 1 layer, and Electrical Test data to produce estimates of defect rates. A benefit of the hierarchical approach is that the parameters of the high-level model may be interpreted as the relative contributions of the sub-models to the overall yield. Additionally, the output from the sub-models may be monitored with a control chart that is ‘oriented’ toward yield.


Control Chart Hierarchical Modeling Defect Rate Intermediate Data Statistical Quality Control 
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  1. Cunningham, S.P. and MacKinnon, S. (1998) Statistical methods for visual defect methodology. IEEE Transactions on Semiconductor Manufacturing 11(1): 48-53.CrossRefGoogle Scholar
  2. Friedman, D.J., Hansen, M.H., Nair, V.N. and James, D.A. (1997) Model-free estimation of defect clustering in integrated circuit fabrication. IEEE Transactions in Integrated Circuit Manufacturing 10(3): 344-359.Google Scholar
  3. Hansen, M.H., Nair, V.N. and Friedman, D.J. (1997) Monitoring wafer map data from integrated circuit fabrication processes for spatially clustered defects. Technometrics 39(3): 241-254.MATHCrossRefGoogle Scholar
  4. Hastie, T., Tibshirani, R. and Friedman, J. (2001) The elements of statistical learning: data mining, inference, and prediction. Springer-Verlag, Berlin New York.MATHGoogle Scholar
  5. Hess, C. and Weiland, L.H. (1999) Extraction of wafer-level defect density distributions to improve yield prediction. IEEE Transactions on Semiconductor Manufacturing 12(2): 175-183.CrossRefGoogle Scholar
  6. Horton, D. (1998) Modeling the yield of mixed-technology die. Solid State Technology 41(9): 109-119.Google Scholar
  7. Hosmer, D. W. and Lemeshow, S. (2000). Applied logistic regression, 2nd ed., John Wiley & Sons, New York.MATHGoogle Scholar
  8. Jearkpaporn, D., Montgomery, D.C., Runger, G. and Borror, C.M. (2003) Process monitoring for correlated gamma distributed data using generalized linear model based control charts. Quality and Reliability Engineering International 19(6): 477-491.CrossRefGoogle Scholar
  9. Johnson, R.A. and Wichern, D.W. (1992). Applied multivariate statistical analysis, 3rd ed., Prentice Hall, Englewood Cliffs, New Jersey.MATHGoogle Scholar
  10. Kumar N, Kennedy K, Gildersleeve K, Abelson R, Mastrangelo CM, and Montgomery DC (2006) A review of yield modeling techniques for semiconductor manufacturing. International Journal of Production Research 44(23): 5019-5036.MATHCrossRefGoogle Scholar
  11. McCullagh P and Nelder JA (1989) Generalized linear models. Chapman & Hall, London.MATHGoogle Scholar
  12. Montgomery DC (2005) Introduction to statistical quality control 5th ed. John Wiley & Sons, NY.MATHGoogle Scholar
  13. Myers RH, Montgomery DC, and Vining GG (2002). Generalized linear models with applications in engineering and the sciences, John Wiley & Sons, NY.MATHGoogle Scholar
  14. Nurani RK, Strojwas AJ, Maly WP, Ouyang C, Shindo W, Akella R, McIntyre MG, and Derrett J (1998) In-line yield prediction methodologies using patterned wafer inspection information. IEEE Transactions on Semiconductor Manufacturing 11(1): 40- 47.CrossRefGoogle Scholar
  15. Skinner KR, Montgomery DC, Runger GC, Fowler JW, McCarville DR, Rhoads TR and Stanley JD (2002) Multivariate statistical methods for modeling and analysis of wafer probe test data. IEEE Transactions on Semiconductor Manufacturing 15(4): 523-530.CrossRefGoogle Scholar
  16. Skinner KR, Montgomery DC, and Runger GC (2003) Process monitoring for multiple count data using generalized linear model-based control charts. International Journal of Production Research 41(6): 1167-1180.MATHCrossRefGoogle Scholar
  17. Van Zant P (2004) Microchip fabrication: a practical guide to semiconductor processing. McGraw-Hill, New York.Google Scholar

Copyright information

© Physica-Verlag Heidelberg 2010

Authors and Affiliations

  • Christina M. Mastrangelo
    • 1
  • Naveen Kumar
    • 2
  • David Forrest
    • 3
  1. 1.University of WashingtonSeattleUSA
  2. 2.Intel HillsboroORUSA
  3. 3.Virginia Institute of Marine ScienceGloucester PointUSA

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