The MASTER Framework has a two level architecture. The first level consists of a standard structure format and a set of ’MASTER Tools’. This provides a high quality utility based framework that supports highly interactive use. The second level is a ’Virtual Wafer Fab’ that adds capabilities for large-scale simulation-based design and experimentation. Powerful semiconductor technology CAD systems are constructed by populating The MASTER Framework with conforming process and device simulators.
KeywordsDevice Simulation Multiple Simulator Misalignment Tolerance Selected Input Parameter Simulator Library
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