Abstract
Technology computer-aided design (TCAD) is essential to the design of modern integrated circuit fabrication processes. TCAD tools must not only model real processes accurately, to allow predictive simulation during technology research and development, but must work together as an integrated system to allow efficient exploration of technology options. Sensitivity and statistical analyses using an integrated TCAD system provide rapid technology characterization, including the examination of process extremes, before fabrication. This predictive capability reduces the technology design interval, and enables the design of optimized, manufacturable designs. This paper describes the integrated TCAD system in use at AT&T.
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References
P. Lloyd, H. K. Dirks, E. J. Prendergast, and K. Singhal, “Technology CAD for Competitive Products,” IEEE Trans. Computer-Aided Design, vol. 9, no. 11, pp. 1209–1216, Nov. 1990.
A. V. Aho, B. W. Kernighan, and P. J. Weinberger, The AWK Programming Language, Reading, MA: Addison-Wesley, 1988.
C. S. Rafferty, M. D. Giles, H.-H. Vuong, S. A. Eshraghi, M. R. Pinto and S. J. Hillenius, “Anomalous short-channel body coefficients due to transient enhanced diffusion,” Proc. VLSI Process/Device Modeling Workshop (VPAD), May 1993.
M. R. Pinto, D. M. Boulin, C. S. Rafferty, R. K. Smith, W. M. Coughran, I. C. Kizilyalli, and M. J. Thoma, “Three-dimensional characterization of bipolar transistors in a submicron BiCMOS technology using integrated process and device simulation,” IEDM Technical Digest, pp. 923–926, Dec. 1992.
A. M. Lin, D. A. Antoniadis, and R. W. Dutton, “The Oxidation Rate Dependence of Oxidation-Enhanced Diffusion of Boron and Phosphorus in Silicon,” J. Electrochem. Soc., vol. 128, p. 1131, 1981.
D. W. Hess and B. E. Deal, J. Electrochem. Soc., vol. 124, no. 5, p. 735, 1977.
Penumalli, B.R., “A Comprehensive Two-Dimensional VLSI Process Simulation Program, BICEPS,” IEEE Trans. Electron Devices, vol. ED-30, no. 9, pp. 986–992, Sep. 1983.
M. R. Pinto, “Simulation of ULSI Device Effects,” in 1991 ULSI Science and Technology, J. Andrews and G. Cellar eds., Electrochem. Soc. Proc., vol. 91–11, pp. 43–51, 1991.
W. M. Coughran Jr., M. R. Pinto, R. K. Smith, “Adaptive Grid Generation for VLSI Device Simulation,” IEEE Trans. Computer-Aided Design, vol. 10, no. 10, p. 1259, Oct. 1991.
W. L. Engl, R. Laur, and H. K. Dirks, “MEDUSA—A Simulator for Modular Circuits,” IEEE Trans. Computer-Aided Design, vol. 1, no. 2, pp. 85–93, Apr. 1982.
F. Venturi, R. K. Smith, E. Sangiorgi, M. R. Pinto, and B. Riccb, “A General Purpose Device Simulator Coupling Poisson and Monte Carlo Transport with Applications to Deep Submicron MOSFETs,” IEEE Trans. Computer-Aided Design, vol. 8, no. 4, pp. 360–369, Apr. 1989.
J. D. Bude and R. K. Smith, “Phase Space Simplex Monte Carlo for Semiconductor Transport,” Proc. Eighth Intl. Conf. on Hot Carriers in Semiconductors, Oxford, 1993.
J. D. Bude and I. C. Kizilyalli, “New Mechanism for Bipolar Degradation in Submicron BiCMOS,” Proc. Symp. on VLSI Technology, 1993.
B. R. Chawla and H. K. Gummel, “A Boundary Technique for Calculation of Distributed Resistances,” IEEE Trans. Electron Devices, vol. ED-17, no. 10, Oct. 1970.
T. A. Lenahan, “Calculation of Transmission–Line Parameters for 2D IC Interconnects,” AT&T Technical Memorandum 52174–120988–01, 1988.
L. W. Nagel, “ADVICE for Circuit Simulation,” Proc. ISCAS, Apr. 1980.
H. K. Gummel and H. C. Poon, “An Integral Charge-Control Model for Bipolar Transistors,” Bell Syst. Tech. J., vol. 49, no. 5, pp. 827–852, May 1970.
G. M. Kull, L. W. Nagel, S.-W. Lee, P. Lloyd, E. J. Prendergast, and H. Dirks, “A Unified Circuit Model for Bipolar Transistors Including Quasi-Saturation Effects,” IEEE Trans. Electron Dev., vol. 32, no. 6, pp. 1103–1113, Jun. 1985.
C. C. McAndrew, “A Complete and Consistent Electrical/Thermal HBT Model,” Proc. IEEE BCTM, pp. 200–203, Oct. 1992.
S. Liu and L. W. Nagel, “Small-Signal MOSFET Models for Analog Circuit Design,” IEEE J. Solid-State Circuits, vol. SC-17, no. 6, pp. 983–998, Dec. 1982.
S.-W. Lee and R. C. Rennick, “A Compact IGFET MODEL-ASIM,” IEEE Trans. Computer-Aided Design, vol. 7, no. 9, pp. 952–975, Sep. 1988.
Y. Tsividis and K. Suyama, “MOSFET Modeling for Analog Circuit CAD: Problems and Prospects,” Proc. CICC, pp. 14.1.1–14.1.6, May 1993.
C. C. McAndrew, B. K. Bhattacharyya, and O. Wing, “A Single Piece, C∞ Continuous MOSFET Model Including Subthreshold Conduction,” IEEE Electron Device Lett., vol. 12, no. 10, pp. 565–567, Oct. 1991.
K. Singhal, C. C. McAndrew, S. R. Nassif, and V. Visvanathan, “The CENTER Design Optimization System,” AT&T Technical Journal, vol. 68, no. 3, pp. 77–92, May/June 1989.
H. K. Dirks, R. Erwe, J. L. Lentz, C. C. McAndrew, S. R. Nassif, E. J. Prendergast, and K. Singhal, “The Modeling and Optimization of GaAs HFET Structures,” Proc. NASECODE VI, Dublin, Ireland, pp. 28–39, July 1989.
P. Lloyd, “Application of Numerical Simulation in Modeling of IC Device Structures,” in Proc. NASECODE III, Galway, 1983.
E. J. Prendergast, “An Integrated Approach to Modeling,” in Proc. NASECODE IV D b in, 1985.
G. Booch, Object-Oriented Design with Applications, Benjamin-Cummings, 1991.
S. G. Duvall, “An Interchange Format for Process and Device Simulation,” IEEE Trans. Computer-Aided Design,vol. 7, no. 7, pp. 741–754, 1988.
F. Fasching, C. Fischer, S. Selberherr, H. Stippel, W. Tuppa, and H. Read, “A PIF implementation for TCAD purposes,” Simulation of Semiconductor Devices and Processes (SISDEP), vol. 4, pp. 477–482, Sept. 1991.
A. Wong, W. Dietrich, and M. Karasick eds., “Semiconductor Wafer Representation Architecture, Version 1.0,” CFI TCAD Framework Group, CAD Framework Initiative, Inc., Document TCAD-91-G-1, June 1992.
D. Hare and K. DeVilbiss eds., “Inter-Tool Communication Architecture,” CFI Inter-Tool Communication TSC, CAD Framework Initiative, Inc., Document 55, June 1991.
W. R. Stevens, UNIX ® Network Programming, Englewood Cliffs, NJ: Prentice-Hall, pp. 153–169, 1990.
Op. cit., pp. 110–115.
G. Springer and D. P. Friedman, Scheme and the Art of Programming, Cambridge, MA: MIT Press, 1989.
J. K. Ousterhout, “TCL: An Embeddable Command Language,” Proc. 1990 Winter USENIX Conference, pp 133–146, 1990.
I. C. Kizilyalli, T. E. Ham, K. Singhal, J. W. Kearney, W. Lin, and M. J. Thoma, “Predictive Worst-Case Statistical Modeling of 0.81.tm BICMOS Bipolar Transistors: A Methodology Based on Process and Mixed Device/Circuit Level Simulators,” IEEE Trans. Electron Dev., vol. 40, no. 5, pp. 966–973, May 1993.
R. A. Becker, J. M. Chambers, and A. R. Wilks, The New S Language, Pacific Grove, CA: Wadsworth, 1988.
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Lloyd, P. et al. (1993). Technology CAD at AT&T. In: Fasching, F., Halama, S., Selberherr, S. (eds) Technology CAD Systems. Springer, Vienna. https://doi.org/10.1007/978-3-7091-9315-0_1
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DOI: https://doi.org/10.1007/978-3-7091-9315-0_1
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