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The Evolution of Dependable Computing in Italy

  • P. Ciompi
  • F. Grandoni
  • L. Strigini
  • L. Simoncini
Conference paper
Part of the Dependable Computing and Fault-Tolerant Systems book series (DEPENDABLECOMP, volume 1)

Abstract

This brief history of the evolution of dependable computing in Italy begins at the end of the sixties with the need to produce test sequences and testing tools to verify hardware implemented using discrete components. At the same time, as the relevance of a system approach to the problem of dependability had already been perceived, research work was being started in the academic world in the error detecting and correcting codes fields, and in complex system diagnosis. These studies greatly benefitted from the strong mathematical background of the researchers initially involved. This work was considerably developed during the seventies, following the technological evolution. The difficulties involved in generating tests with high coverage determined the need to embed features for easy testability and diagnosability into system design. The architectural evolution from uniprocessor to multiple processor systems, either in tightly coupled or in loosely coupled configurations, together with the medium term industrial interest in promoting prototyping efforts, particularly in the industrial process control and on-line transaction processing fields, have produced a wide range of studies covering all system aspects (physical configuration, operating systems, programming languages and environments). This interest has steadily grown up until the present days, with increased emphasis being placed on dependability attributes.

Keywords

Fault Tolerance Fault Treatment Multiprocessor System Residue Number System Arithmetic Code 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. [Adornisi]
    Adorni, A., Boccalatte, A., Di Manzo, M., “Modello di Recovery per Sistemi Concorrenti”, Proc. AICA 81, Pavia, Sept. 1981, pp. 493–499Google Scholar
  2. [Ancilotti83a]
    Ancilotti, P., Fusani, M., Implementation Schemes “Implementation Schemes for a Crash Recovery Mechanism”, CNET Internal Report No. 79, Proc. International Computing Symposium, Nurnberg, Mar. 1983.Google Scholar
  3. [Ancilotti83b]
    Ancilotti, P., Boari, M., Lijtmaer, N., “Language Features for Access Control”, IEEE Trans, on Software Engineering, Vol. SE-9, No. 1, Jan. 1983, pp. 16–24.CrossRefGoogle Scholar
  4. [Ancilotti84]
    Ancilotti, P., Fusani, M., “Distributed Algorithm “Distributed Algorithm for Deadlock Detection in Distributed Systems”, Proc. First International Symposium on Applied Informatics, Innsbruck, Feb. 1984.Google Scholar
  5. [Ancilotti85]
    Ancilotti, P., Fusani, M., “Support for Transaction and Recovery in CNET Applications”, IEEE Computer Architecture TC, Newsletter, June 1985.Google Scholar
  6. [Annaratone82]
    Annaratone, M., Sami, M. G., “An Approach to Functional Testing of Microprocessors”, Proc. FTCS-12, Santa Monica, June 1982.Google Scholar
  7. [Annaratone83]
    Annaratone, M., Stefanelli, R., “A Multiplier with Multiple Error Correction Capabilities”, Proc. 6th Symposium on Computer Arithmetic, IEEE, Aarhus, 1983. Computer Arithmetic, IEEE, Aarhus, 1983.Google Scholar
  8. [Antola84a]
    Antola, A., Scarabottolo, N., “Backward Error Recovery in Concurrent Environment”, Proc. EUROMICRO, Copenhagen, Aug. 1984, pp. 45–52.Google Scholar
  9. [Antola84b]
    Antola. A., Scarabottolo, N., “Concurrent Programming Robustness”, Proc. COMPSAC,, Chicago, Nov. 1984, pp. 333–339.Google Scholar
  10. [Antola85]
    Antola, A., Negrini, R., Sami, M. G., Scarabottolo, N., “Transient Fault Management in Microprogrammed Units: A Software Recovery Approach”, Proc. EUROMICRO, Brussels, Sept. 1985, pp. 453–461.Google Scholar
  11. [Bagnasco85]
    Bagnasco, S., Manzo, F., Piazza, F., “Requirements and Design for a Distributed Computerized System for Safety and Control Applications”, Proc. SAFECOMP 85, Como, Oct. 1985, pp. 85–94.Google Scholar
  12. [Baiardi81]
    Baiardi, F., Fantechi, A., Tornasi, A., Vanneschi, M, “Mechanisms for a Robust Multiprocessing Environment in the MuTEAM Kernel”, Proc. FTCS-11, Portland, June 1981, pp. 20–24.Google Scholar
  13. [Barigazzi82a]
    Barigazzi, G., Ciuffoletti, A., Strigini, L., “Reconfiguration Procedure in a Distributed Multiprocessor Systems”, Proc. FTCS-12, Santa Monica, June 1982, pp. 71–76.Google Scholar
  14. [Barigazzi82b]
    Barigazzi, G., Ciuffoletti, A., Strigini, L., “A Distributed Algorithm for Post-Failure Load Redistribution”, Proc. 3rd International Conference on Distributed Computing Systems, Miami, Oct. 1982, pp. 73–80.Google Scholar
  15. [Barigazzi83]
    Barigazzi, G., Strigini, L., “Application-Transparent Setting of Recovery Points”, Proc. FTCS-13, Milano, June 1983, pp. 48–55.Google Scholar
  16. [Barsi72]
    Barsi, F., Maestrini, P., “Arithmetic Error Correction in Redundant Residue Number Systems”, Proc. of Colloque International sur la Conception et Maintenance des Automatismes Logiques”, Toulouse, Sept. 1972.Google Scholar
  17. [Barsi73]
    Barsi, F., Maestrini, P., “Error Correcting Properties of Redundant Residue Number Systems”, IEEE Trans, on Comp., Vol. C-22, No. 3, Mar. 1973, pp. 307–315.MathSciNetCrossRefGoogle Scholar
  18. [Barsi74a]
    Barsi, F., Maestrini, P., “Concurrent Detection of Additive Overflow and Arithmetic Errors in Residue Codes”, Calcolo, Vol. 11, No. 2, June 1974, pp. 1–24.MathSciNetCrossRefGoogle Scholar
  19. [Barsi 74b]
    Barsi. F., Maestrini, P., “Error Detection and Correction by Product Codes in Residue Number Systems”, IEEE Trans, on Comp., Vol. C-23, No. 9, Sept. 1974, pp. 915–924.Google Scholar
  20. [Barsi74c]
    Barsi, F., Maestrini, P., “Fault-Tolerant Computing by Using Residue Number Systems”, Proc. International Computing Symposium, 1973, edited by Gunther, Levrat, Lipps, North Holland Publishing Company, 1974, pp. 225–230.Google Scholar
  21. [Barsi74d]
    Barsi, F., Maestrini, P., “Error Detection in Residue Number Systems with Magnitude Index”, Proc. International Symposium on Discrete Systems, Riga, Oct. 1974.Google Scholar
  22. [Barsi75]
    Barsi, F., Grandoni, F., Maestrini, P., “Diagnosability of Systems Partitioned into Complex Units”, Proc. FTCS-5, Paris, June 1975.Google Scholar
  23. [Barsi76]
    Barsi, F., Grandoni, F., Maestrini, P., “A Theory of Diagnosability of Digital Systems”, IEEE Trans, on Comp., Vol. C-25, No. 6, June 1976, pp. 585–593.MathSciNetCrossRefGoogle Scholar
  24. [Barsi77]
    Barsi, F., Maestrini, P., “Arithmetic Codes in Residue Number Systems”, Abstracts of papers of the 1977 International Symposium on Information Theory, Ithaca, Oct. 1977, p. 131.Google Scholar
  25. [Barsi78a]
    Barsi, F., Maestrini, P., “A Class of Multiple-Error Correcting Arithmetic Residue Codes”, Information and Control, Vol. 36, No. 1, Jan. 1978, pp. 28–41.MATHMathSciNetCrossRefGoogle Scholar
  26. [Barsi78b]
    Barsi, F., Maestrini P., “Arithmetic Codes in Residue Number Systems”, Digital Processes, Vol. 4, No. 2, pp. 121–135, Summer 1978.MATHMathSciNetGoogle Scholar
  27. [Barsi78c]
    Barsi, F., Maestrini, P., “Improved Decoding Algorithms for Arithmetic Residue Codes”, IEEE Trans, on Inform. Theory, Vol. IT-24, No. 5, Sept. 1978, pp. 640–643.MathSciNetCrossRefGoogle Scholar
  28. [Barsi78d]
    Barsi, F., Maestrini, P., “Error Codes in Residue Number Systems with Magnitude Index”, Calcolo, Vol. 15, No. 3, Sept. 1978, pp. 299–316.MATHMathSciNetCrossRefGoogle Scholar
  29. [Barsi78e]
    Barsi, F., Maestrini, P., “Arithmetic Codes in Residue Number Systems with Magnitude Index”, IEEE Trans, on Comp., Vol. C-27, No. 12,, Dec. 1978, pp. 1185–1188.Google Scholar
  30. [Barsi79]
    Barsi, F., Maestrini, P., “A Class of Error Correcting Codes Constructed in Residue Number Systems with Non-Prime Moduli”, Abstracts of Papers of the 1979 International Symposium on Information Theory, Grignano, June 1979.Google Scholar
  31. [Barsi80]
    Barsi, F., Maestrini, P., “Error Codes Constructed in Residue Number Systems with Non-Pairwise-Prime Moduli”, Information and Control, Vol. 46, No. 1, July 1980, pp. 16–25.MATHMathSciNetCrossRefGoogle Scholar
  32. [Barsi 81]
    Barsi, F., “Probabilistic Syndrome Decoding in Self-Diagnosable Digital Systems”, Digital Processes, Vol. 7, No. 1,, Jan. 1981, pp. 33–46.Google Scholar
  33. [Bellman76]
    Bellman, A., “Redundancy Design Approach Applied to Electronic Telephone Exchange Realizations”, Proc. FTCS-6, Pittsburgh, June 1976, pp. 9–15.Google Scholar
  34. [Bellman86]
    Bellman, A., “Switching Architectures Towards the Nineties”, Proc. 1986 International Zurich Seminar on Digital Communications, Zurich, Mar. 1986.Google Scholar
  35. [Bovo84]
    Bovo, A., Bellman, A., “UT100/60. An Electronic Digital Family of Exchanges for Large Capacity Applications”, Proc. ISS’84, Florence, May 1984.Google Scholar
  36. [Briatico84]
    Briatico, D., Ciuffoletti, A., Simoncini, L., “A Distributed Domino-Effect Free Recovery Algorithm”. Proc. 4th Symposium on Reliability in Distributed Software and Database Systems, Silver Spring, Oct. 1984.Google Scholar
  37. [Briatico85]
    Briatico, D., Ciuffoletti, A., Simoncini, L., Strigini. L., “An Implementation of Error Detection and Fault Treatment for the MuTEAM Prototype”, IEEE Distributed Processing TC Newsletter, Oct. 1985.Google Scholar
  38. [Bruno85]
    Bruno, G., Ciminiera, L., “MODIAC: A Distributed System for Industrial Automation”, IEEE Computer Architecture TC Newsletter, June 1985.Google Scholar
  39. [Cabodi85a]
    Cabodi, G., Camurati, P., Prinetto, P., “TPDL: A Language to Describe Temporal Conditions from Behaviour to Electric Level”, Proc. EUROMICRO, Brussels, Sept. 1985, pp. 487–495.Google Scholar
  40. [Cabodi85b]
    Cabodi, G., Camurati, P., Prinetto, P., “The Use of CON-LAN in Formal Syntactic and Semantic Verification of Hardware Description Languages”, Proc. EUROMICRO, Brussels, Sept. 1985, pp. 497–606.Google Scholar
  41. [Cabodi86]
    Cabodi, G., Camurati, P., Prinetto, P., “The Use of Prolog for Executable Specification and Verification of Easily Testable Designs”, Proc. FTCS-16, Vienna, July 1986.Google Scholar
  42. [Capizzi83]
    Capizzi, G., Cianci, C., Melgara, M., “An Easily Testable Speech Synthesizer”, Proc. EUROMICRO, Madrid, Sept. 1983.Google Scholar
  43. [Ciaramella79]
    Ciaramella, A., “Testing of Microprogrammed Units”, Proc. FTCS-9, Madison, June 1979.Google Scholar
  44. [Ciminiera8l]
    Ciminiera, L., Serra, A. “Tolleranza ai Guasti e Tecniche di Reinstradamento nelle Reti di Interconnessione”, Proc. AICA 81, Pavia, Sept. 1981, pp. 601–606.Google Scholar
  45. [Ciminiera82]
    Ciminiera, L., Serra, A. “Performance-Fault Tolerance Tradeoffs in Single Stage Connecting Networks”, Proc. FTCS-12, Santa Monica, June 1982, pp. 209–212.Google Scholar
  46. [Ciminiera84]
    Ciminiera, L., “Design for Diagnosability Issues in Rectangular Banyan Networks”, Proc. FTCS-14, Kissimee, Florida, June 1984, pp. 178–183.Google Scholar
  47. [CioffiBl]
    Cioffi, G., Corsini, P., Frosini, G., Lopriore, L., “MuTEAM: Architectural Insights of a Distributed Multimicroprocessor System”, Proc. FTCS-11, Portland, June 1981, pp. 17–19.Google Scholar
  48. [Ciompi74]
    Ciompi, P., Simoncini, L., “The Boundary Graphs: An Approach to the Diagnosability with Repair of Digital Systems”, Proc. 3rd Texas Conference on Computing Systems, Austin, Nov. 1974.Google Scholar
  49. [Ciompi75]
    Ciompi, P., Simoncini, L., “Fault Detection and Diagnosis of Digital Systems: A Review”, Proc. 3rd International Seminar on “Applied Aspects of the Automata Theory”, Varna, June 1975.Google Scholar
  50. [Ciompi77]
    Ciompi, P., Simoncini, L., “Design of Self-Diagnosable Minicomputers Using Bit Sliced Microprocessors”, Journal of Design Automation and Fault Tolerant Computing, Vol. I, No. 4, Oct. 1977, pp. 363–375.Google Scholar
  51. [Ciompi79]
    Ciompi, P., Simoncini, L., “Analysis and Optimal Design of Self Diagnosable Systems with Repair”, IEEE Trans, on Comp., Vol. C-28, May 1979, pp. 362–365.Google Scholar
  52. [Ciompi81a]
    Ciompi, P., Grandoni, F., Simoncini, L., “Distributed Diagnosis in Multiprocessor Systems: The MuTEAM Approach”, Proc. FTCS-11, Portland, June 1981, pp. 25–29.Google Scholar
  53. [Ciompi81b]
    Ciompi, P., Grandoni, F., Simoncini, L., “Self-Diagnosis in Multiprocessor Systems: The MuTEAM Approach”, Proc. FTSD, Brno, Sept. 1981, pp. 193–199.Google Scholar
  54. [Ciompi83a]
    Ciompi, P., La Manna, M., Lissoni, C., Martin, I. R., Simoncini, L., “A Proposal for Highly Available Multiprocessor System”, Proc. 5th International Conference on Control System and Computer Science, Bucharest, June 1983.Google Scholar
  55. [Ciompi83b]
    Ciompi, P., La Manna, M., Lissoni, C., Martin, I. R., Simoncini, L., “A Highly Available Multiprocessor System for Real-Time Applications”, Proc. SAFECOMP 83, Cambridge, Sept. 1983.Google Scholar
  56. [Ciompi83c]
    Ciompi, P., La Manna, M., Lissoni, C., Simoncini, L., “Proposta per un Sistema Distribuito Fault-Tolerant per Applicazioni Real-Time”, Proc. AICA 83, Napoli, Sept. 1983.Google Scholar
  57. [Ciompi 83d]
    Ciompi, P., La Manna, M., Lissoni, C., Simoncini, L., “A Redundant Distributed System Supporting Atomic Transactions for Real-Time Control”, Proc. 1983 Real-Time Systems Symposium, Arlington, Virginia, Dec. 1983 and in Actes Journées Européennes d’Etude sur les Systèmes Informatiques Distribues, Le Mont Saint Michel, Sept. 1983, pp. 45–50.Google Scholar
  58. [Ciufïoletti81a]
    Ciufïoletti, A., Simoncini, L. “Design of Multilevel Fault Tolerant Systems”, Workshop on Self-Diagnosis and Fault Tolerance, Tubingen, July 1981 e in Self Diagnosis and Fault Tolerance, ATTEMPTO Verlag, Tubingen GmbH, pp. 65–83.Google Scholar
  59. [Ciufïoletti81b]
    Ciufïoletti, A., Simoncini, L., “Integrated Design Methodology of Failure Tolerant Systems”, Proc. FTDS, Brno, Sept. 1981, pp. 49–53.Google Scholar
  60. [Ciuffoletti81c]
    Ciufïoletti, A., Simoncini, L., “Structured Design of Failure Tolerant Systems”, Proc. AICA 81, Pavia, Sept. 1981, pp. 587–593.Google Scholar
  61. [Ciufïoletti83]
    Ciufïoletti, A., “Specifiche per un Algoritmo di Error Recovery Distribuito”, Proc. AICA 83, Napoli, Sept. 1983, pp. 325–341.Google Scholar
  62. [Ciufïoletti84]
    Ciufïoletti, A., “Error Recovery in Systems of Communicating Processes”, Proc. 7th Int. Conference on Software Engineering, Orlando, Mar. 1984, pp. 6–17.Google Scholar
  63. [Corradi83a]
    Corradi, A., Natali, A., “Towards Fault Tolerance in Distributed Systems Via Replication of Data: An Implementation”, Proc. FTCS-13, Milano, 1983, pp. 14–23.Google Scholar
  64. [Corradi83b]
    Corradi, A., Natali, A., “A Fault Tolerant Implementation of Rendez-vous in a Distributed Environment”. Communication in Distributed Systems. Informatik-Fachberichte, Springer Verlag 1983.Google Scholar
  65. [Corsini82a]
    Corsini, P., Lopriore, L., Strigini, L., “A Proposal for Fault-Tolerance in a Multiprocessor System”, Proc. 20th Annual Allerton Conference, Monticello, Oct. 1982, pp. 996–1007.Google Scholar
  66. [Corsini82b]
    Corsini, P., “Z8001-Based Central Processing Unit with Capability Addressing”, Electronics Letters, Vol. 18, No. 18, Sept. 1982, pp. 780–782.CrossRefGoogle Scholar
  67. [Corsini83]
    Corsini, P., “Intelligent Memory Subsystem Supporting Memory Virtualisation”, Electronics Letters, Vol. 19, No. 7, March 1983, pp. 265–266.CrossRefGoogle Scholar
  68. [Corsini84a]
    Corsini. P., Simoncini, L., Strigini, L., “MuTEAM: A Mul-timicroprocessor Architecture with Decentralized Fault Treatment” Proc. 17th Annual Hawaii, Intern. Conf. on System Sciences, Jan. 1984, and in Actes de Journees Européennes d’Etude sur les Systèmes Informatiques Distribues, Le Mont Saint Michel, Sept. 1983.Google Scholar
  69. [Corsini84b]
    Corsini, P., Simoncini, L., Strigini, L., “The Architecture and the Fault Treatment of MuTEAM”, Proc. 2nd GI/NTG/GMR Conference on Fault Tolerant Computing Systems, Bonn, Sept. 1984.Google Scholar
  70. [Corsini84c]
    Corsini, P., Frosini, G., Lopriore, L., “The Implementation of Abstract Objects in a Capability Based Addressing Architecture”, The Computer Journal, Vol. 27, No. 2, 1984, pp. 127–134.CrossRefGoogle Scholar
  71. [Corsini84d]
    Corsini, P., Frosini, G., Lopriore, L., “Distributing and Revoking Access Authorizations on Abstract Objects: A Capability Approach”, Software-Practice and Experience, Vol. 14(10), Oct. 1984, pp. 931–943,.Google Scholar
  72. [Corsini85a]
    Corsini, P., Simoncini, L., Strigini, L., “The MuTEAM Distributed Multiprocessor Architecture”, IEEE Computer Architecture TC Newsletter, June 1985.Google Scholar
  73. [Corsini85b]
    Corsini, P., Prete, C. A., Simoncini, L., “MuTEAM: An Experience in the Design of Robust Multimicroprocessor Systems”, Journal of Computer Systems Science and Engineering, Butterworths, Vol. 1, No. 1, Oct. 1985.Google Scholar
  74. [Crespi83]
    Crespi Reghizzi, S., Natali, A., “Software Tools for Adding Fault-Tolerance to Concurrent, Distributed Programs”, Actes de Journees Européennes d’Etude sur les Systèmes Informatiques Distribues, Le Mont Saint Michel, Sept. 1983.Google Scholar
  75. [DiSanto83]
    Di Santo, M., Nigro, L., Russo, W., “Programming Reliable and Robust Software in ADA”, Proc. FTCS-13, Milano, June 1983, pp. 196–203.Google Scholar
  76. [Distante85]
    Distante, F., “A Petri Net Matrix Approach in VLSI Functional Testing”, Proc. EUROMICRO, Brussels, Sept. 1985, pp. 347–355.Google Scholar
  77. [Donatiello]
    Donatiello, L., Iyer, B. R., “Analysis of a Composite Performance Reliability Measure for Fault Tolerant Systems’, IBM RC 10325, NY., to appear in ACM.Google Scholar
  78. [Faro84]
    Faro, A., et al., “The MODIAC Local Communication Network for Process Control”, Proc. 1st. Int. Conf. on Computers and Applications, Beijing, June 1984, pp. 669–676.Google Scholar
  79. [Friedman78]
    Friedman, A. D., Simoncini, L., “Incomplete Fault Coverage in Modular Multiprocessor Systems”, Proc. ACM Annual Conference 1978, Washington, D. C., Dec. 1978, pp. 210–216.Google Scholar
  80. [Friedman79]
    Friedman, A. D., Simoncini, L., “Concurrent Diagnosis in Parallel Systems”, Proc. 1979 International Conference on Parallel Processing, Bellaire, Aug. 1979, pp. 270–286.Google Scholar
  81. [FriedmanöO]
    Friedman, A. D., Simoncini, L., “System Level Fault Diagnosis”, Computer, Vol. 13, No. 3, Mar. 1980, pp. 47–53.CrossRefGoogle Scholar
  82. [Gai84]
    Gai, S., Mezzalama, M., Olla F., “Optimal Algorithms for PLA Testing”, Olivetti Res. & Tech. Review No. 1/1984.Google Scholar
  83. [Garetti82]
    Garetti, P., Laface, P., Rivoira, S., “MODIAC: A Modular Distributed Operating System Kernel for Real-Time Process Control”, the EUROMICRO Journal, Vol. 9, No. 4, Apr. 1982, pp. 201–213.Google Scholar
  84. [Giovannetti8l]
    Giovannetti, G., Tucci, S., “Valutazione di uno Schema di Recovery per una Base di Dati Distribuita”, Proc. AICA 81, Pavia, Sept. 1981, pp. 741–750.Google Scholar
  85. [Grandoni81]
    Grandoni, F., Baiardi, F., Cioffi, G., Ciompi, P., Corsini, P., Fantechi, A., Frosini, G., Lopriore, L., Simoncini, L., Tornasi, A., Vanneschi, M., “The MuTEAM System: General Guidelines”, Proc. FTCS-11, Portland, June 1981, pp. 15–16.Google Scholar
  86. [Iyer]
    Iyer, B. R., Donatiello, L., Heidelberger, P., “Analysis of Perfor-mability for Stochastic Models of Fault-Tolerant Systems”, IBM RC 10719, M. Y., to appear on IEEE Trans, on Comp.Google Scholar
  87. [LaManna85a]
    La Manna, M., Simoncini, L., “An Implementation of Optimistic Policy for Concurrency Control on a Computer Network for Real-Time Applications”, Microprocessing & Microprogramming, North Holland Pub. Co. 1985.Google Scholar
  88. [LaManna85b]
    La Manna, M., “Real Time Systems with Highly Reliable Storage Media: A Case Study”, Proc. SAFECOMP 85, Como, Oct. 1985, pp. 79–84.Google Scholar
  89. [Lamponi84]
    Lamponi, P., Maggioni, V., “A Fault-Tolerant Interface for a Fiber-Optics Lan”, Proc. EUROMICRO, Copenhagen, Aug. 1984, pp. 79–86.Google Scholar
  90. [Liotta85]
    Liotta, L., Sciuto, D., “Static and Dynamic Redundancy: Proposal and Evaluation of Two Constructs of Software Fault Tolerance”, Proc. EUROMICRO, Brussels, Sept. 1985, pp. 463–473.Google Scholar
  91. [Liu8l]
    Liu, C. L., Maestrini, P., “On the Sequential Diagnosability of Digital Systems”, Proc. FTCS 11, Portland, June 1981, pp. 112–115.Google Scholar
  92. [Lopriore82]
    Lopriore, L., “User-Defined Protection Subsystems in Capability Architectures”, Proc. AICA 82, Padova, Oct. 1982, pp. 613–621.Google Scholar
  93. [Lopriore84]
    Lopriore, L., “Capability Based Tagged Architectures”, IEEE Trans, on Comp., Vol. C-33, No. 9, Sept. 1984, pp. 786–803.CrossRefGoogle Scholar
  94. [Maestrini79a]
    Maestrini, P., “A Connection Assignment Yielding Easily Diagnosable Systems”, Proc. FTSD, Brno, 1979.Google Scholar
  95. [Maestrini79b]
    Maestrini, P., “Complexity Aspects of a Class of Digital Systems”, Proc. 17th Annual Allerton Conference, Allerton House, 1979, pp. 329–338.Google Scholar
  96. [MARA83]
    Several Authors, “Tecniche di Tolleranza ai Guasti per MARA”, Volume Collana Sottoprogetto PI, Obiettivo MUMICRO, PFI, Dee. 1983.Google Scholar
  97. [Martella80a]
    Martella, G., Ronchetti, B., Schreiber, F., “Una Proposta per un Metodo di Analisi della Disponibilità’ nelle Basi di Dati Distribuite”, Proc. AICA 80, Bologna, Oct. 1980, pp. 1515–1530.Google Scholar
  98. [Martella80b]
    Martella, G., Schreiber, F., “Improving Access Interference in Distributed Databases”, Proc. 18th Allerton Conference on Communication, Control and Computing, Monti-cello, Oct. 1980.Google Scholar
  99. [Martella81]
    Martella, G., Ronchetti, B., Schreiber, F., “On Evaluating Availability in Distributed Database Systems’, in Performance Evaluation, Vol. 1, Nov. 1981, pp. 201–211; also in Proc. 5th Berkeley Workshop on Distributed Data Management Corn-put. Networks, Feb. 1981.Google Scholar
  100. [Martella82]
    Martella G., Pernici. B., Schreiber, F., “Distributed Data Base Reliability Analysis and Evaluation”, in Proc. 2nd Symposium on Reliability in Distributed Software and Database Systems, Pittsburgh, July 1982, pp. 94–102.Google Scholar
  101. [Martella85]
    Martella, G., Pernici, B., Schreiber, F. “An Availability Model for Distributed Transaction Systems”, IEEE Trans, on Software Engineering, Vol. SE-11, No. 5, May 1985, pp. 483–491.CrossRefGoogle Scholar
  102. [Morganti78]
    Morganti, M., Coppadoro, G., Ceru, S., “UDET 7116-Common Control for PCM Telephone Exchange: Diagnostic Software Design and Availability Evaluation”, Proc. FTCS-8, Toulouse, June 1978, pp. 16–23.Google Scholar
  103. [Morpurgo85]
    Morpurgo, S., Segre, C., “Fault Simulation, at Register Transfer Level of VLSI”, Olivetti Res. Sc Tech. Review No. 3/1985.Google Scholar
  104. [MUMICR083]
    Several Authors, “The MuTEAM Experience in Designing Distributed Systems for Microprocessors”, Volume Collana Sottoprogetto PI, Obiettivo MUMICRO, PFI, Dee. 1983.Google Scholar
  105. [MUMICR084]
    Several Authors, “MuTEAM: Distributed Multiprocessor Architecture and ECSP Concurrent Language”, Volume Collana Sottoprogetto PI, Obiettivo MUMICRO, PFI, Nov. 1984.Google Scholar
  106. [Natali84]
    Natali, A., Mello, P., “Strumenti per la Gestione di Errori in Programmi Distribuiti”, Proc. AICA 84, Roma, Oct. 1984, Vol. 2, pp. 109–128.Google Scholar
  107. [Negrini8l]
    Negrini, R., Sami. M. G., Scarabottolo N. “System-Level Fault Diagnosis in a Distributed System”, Proc. EUROMICRO, Paris, Sept. 1981, pp. 55–62.Google Scholar
  108. [Negrini82a]
    Negrini, R., Sami. M. G., Stefanelli, R., “Verification of Complex Programs and Microprograms”, in Designing and Programming Modern Computer Systems, S. L. Kartashev and S. P. Kartashev, Eds. Vol. 1, LSI Modular Computer Systems, Engle-wood Cliffs, NJ, Prentice Hall, 1982, Chap. 4.Google Scholar
  109. [Negrini82b]
    Negrini, R., Scarabottolo, N., “Multimicro Processor Debugging based on Fault-Tolerance Techniques: A Case Study”, Proc. EUROMICRO, Antwerp, Dec. 1982, pp. 323–330.Google Scholar
  110. [Negrini83]
    Negrini, R., Sami, M. G., “Some Properties Derived from Structural Analysis of Program Graph Models”, IEEE Trans, on Software Engineering, Vol. SE-9, No. 2, Mar. 1983.Google Scholar
  111. [Negrini84]
    Negrini, R., Sami, M. G., Scarabottolo, N., “Policies for System-Level Diagnosis in a Nonhierarchical Distributed System”, IEEE Trans, on Reliability, Vol. R-33, No. 4, Oct. 1984. pp. 333–342.CrossRefGoogle Scholar
  112. [Negrini85a]
    Negrini, R., Sami, M. G., Stefanelli, R., “Fault-Tolerance Approaches for VLSI/WSI Arrays”, Proc. Conference on Computers and Communication, IEEE, Phoenix, 1985.Google Scholar
  113. [Negrini85b]
    Negrini, R., Stefanelli, R., “Algorithms for Self-Reconfiguration of Wafer-Scale Regular Arrays”, Proc. ICCAS, IEEE, Beijing, 1985.Google Scholar
  114. [Negrini85c]
    Negrini, R., Stefanelli, R., “Time Redundancy in WSI Array of Processing Elements”, Proc. 1 Conf. Supercomputing Systems (SCS-85), Dec. 1985, pp. 429–438.Google Scholar
  115. [Negrini86]
    Negrini, R., Sami. M. G., Stefanelli, R., “Fault Tolerance Techniques for Array Structures used in Supercomputing”, Computer, Vol. 19, No. 2, Feb. 1986, pp. 78–87.CrossRefGoogle Scholar
  116. [Ravasi81]
    Ravasi, G., Rizzi, G., “Memoria a Doppia Porta Fault Tolerant”, Proc. AICA 81, Pavia, Sept. 1981, pp. 613–618.Google Scholar
  117. [Rivoira82]
    Rivoira, S., Serra, A., “A Multimicro Architecture and its Distributed Operating System for Real-Time Control”, Proc. Int. Conf. on Distributed Computing Systems, Ft. Lauderdale, Oct. 1982, pp. 238–246.Google Scholar
  118. [Sami83]
    Sami, M. G., Stefanelli, R. “Reconfigurable Architectures for VLSI Implementation”, Proc. NCC 83, AFIPS, Los Angeles, May 1983, pp. 565–578.Google Scholar
  119. [Sami84a]
    Sami, M. G., Bedina, M., Distante, F., “A Formal Approach to Computer-Assisted Generation of Functional Test Patterns for VLSI devices”, Proc. ISCAS 84, Vol. 1, Montreal, May 1984, pp. 19–23.Google Scholar
  120. [Sami84b]
    Sami, M. G., Stefanelli, R. “Fault Tolerance of VLSI Processing Arrays: the Time-Redundancy Approach”, Proc. 1984 Real-Time Systems Symp., Dec. 1984, pp. 200–207.Google Scholar
  121. [Sami85]
    Sami, M. G., Stefanelli, R., “Fault-Stealing: An Approach to Fault-Tolerance of VLSI Array Structures”, Proc. Int. Conf. Circuits and Systems (ICCAS-85), June 1985, pp. 205–210.Google Scholar
  122. [Schreiber8l]
    Schreiber, F., “Quantitative Evaluation of Availability in Distributed Systems”, Proc. AICA 81, Pavia, Sept. 1981, pp. 729–732.Google Scholar
  123. [Schreiber84a]
    Schreiber, F., “A Framework for Research in Performanee-Availability of Automated Information Systems”, in Proc. 4th Symposium on Reliability in Distributed Software and Database Systems, Silver Spring, Oct. 1984.Google Scholar
  124. [Schreiber84b]
    Schreiber, F., “State Dependency Issues in Evaluating Distributed Database Availability”, Computer Networks, Vol. 8, Sept. 1984.Google Scholar
  125. [Simoncini79a]
    Simoncini, L., Saheban, F., Friedman, A. D., “Concurrent Computation and Diagnosis in Multiprocessor Systems”, Proc. FTCS 9, Madison, June 1979, pp. 149–155.Google Scholar
  126. [Simoncini79b]
    Simoncini, L., “Recent Developments in Self-Diagnostic Models”, Proc. FTSD, Brno, Sept. 1979, pp. 79–92.Google Scholar
  127. [Simoncini80a]
    Simoncini, L., Taylor, H., “Subgraphs Smaller than the Girth in a Regular Graph”, Journal of Graph Theory, Wiley Interscience, Vol. 4, 1980, pp. 101–105.MATHMathSciNetGoogle Scholar
  128. [Simoncini80b]
    Simoncini, L., Saheban, F., Friedman, A. D., “Design of Self-Diagnosable Multiprocessor Systems with Concurrent Computation and Diagnosis”, IEEE Trans, on Comp., Vol. C-29, No. 6, June 1980, pp. 540–546.MathSciNetCrossRefGoogle Scholar
  129. [Simoncini80c]
    Simoncini, L., “Recent Developments in System Level Fault Diagnosis and their Relation to the General Organization of Multiprocessor Systems”, IFIP Working Conference on “Reliable Computing and Fault Tolerance in the 1980’s”, London, Sept. 1979.Google Scholar
  130. [Somenzi83]
    Somenzi, F., Gai, S., Mezzalama, M., Prinetto, P., “PART: Programmable Array Testing based on a PARTitioning algorithm”, Proc. FTCS-13, Milano, June 1983, pp. 430–433.Google Scholar
  131. [Somenzi85]
    Somenzi, F., Gai, S., Mezzalama, M., Prinetto, P., “Testing Strategy and Technique for Macro-Based Circuits”, IEEE Trans, on Comp., Vol. C-34, No. 1, Jan. 1985, pp. 85–89.CrossRefGoogle Scholar
  132. [Stefanelli84]
    Stefanelli R., “Multiple Error Correction in Arithmetic Units with Triple Redundancy”, Proc. EUROMICRO, Copenhagen, Aug. 1984, pp. 205–216.Google Scholar

Copyright information

© Springer-Verlag/Wien 1987

Authors and Affiliations

  • P. Ciompi
    • 1
  • F. Grandoni
    • 1
  • L. Strigini
    • 1
  • L. Simoncini
    • 2
  1. 1.Istituto di Elaborazione dell’InformazionePisaItaly
  2. 2.Universita’ di Reggio CalabriaReggio CalabriaItaly

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