Skip to main content

Abstract

At the outset it seems necessary to clarify the frequently used terms analysis, Simulation and modeling. By tracing the literature one often has the impression that authors use these terms in a fairly arbitrary manner. A while ago I picked up a heavy dictionary and, among many others, I have found the following interpretations to be quite appropriate: Analysis

  • Separation of a whole into its component parts, possibly with comment and judgement

  • examination of a complex, its elements, and their relations in order to learn about

Simulation

  • imitative representation of the functioning of one system or process by means of the functioning of another

  • examination of a problem not subject to experimentation

Modeling

  • to produce a representation or Simulation of a problem or process

  • to make a description or analogy used to help visualize something that cannot be directly observed

Therefore, as difficult as it might be to decide in an individual case, analysis is at least intended to mean “exact analysis” and Simulation must mean “approximate Simulation” by inference. Modeling is obviously a necessity for analysis and Simulation.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 129.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 169.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

Referenees

  1. Adachi, T., Yoshii, A., Sudo, T.: Two-Dimensional Semiconductor Analysis Using Finite-Element Method. IEEE Trans. Electron Devices ED-26, 1026–1031 (1979).

    Google Scholar 

  2. Adler, M. S.: Accurate Calculations of the Forward Drop and Power Dissipation in Thyristors. IEEE Trans. Electron Devices ED-25, No. 1, 16–22 (1978).

    Article  Google Scholar 

  3. Adler, M. S.: A Method for Achieving and Choosing Variable Density Grids in Finite Difference Formulations and the Importance of Degeneracy and Band Gap Narrowing in Device Modeling. Proc. NASECODE I Conf., pp. 3–30. Dublin: Boole Press 1979.

    Google Scholar 

  4. Agajanian, A. H.: A Bibliography on Semiconductor Device Modeling. Solid-State Electron. 18, 917–929 (1975).

    Article  Google Scholar 

  5. Antognetti, P., Antoniadis, D. A., Dutton, R. W., Oldham, W. G.: Process and Device Simulation for MOS-VLSI Circuits. The Hague: Martinus Nijhoff 1983.

    Google Scholar 

  6. Baliga, B. J., Adler, M. S., Gray, P. V., Love, R. P., Zommer, N.: The Insulated Gate Rectifier (IGR): A New Power Switching Device. Proc. International Electron Devices Meeting, pp. 264–267 (1982).

    Google Scholar 

  7. Barnes, J. J.: A Two-Dimensional Simulation of MESFET’s. Dissertation, University of Michigan, 1976.

    Google Scholar 

  8. Barnes, J. J., Lomax, R. J., Haddad, G. I.: Finite-Element Simulation of GaAs MESFET’s with Lateral Doping Profiles and Submicron Gates. IEEE Trans. Electron Devices ED-23, No. 9, 1042–1048 (1976).

    Article  Google Scholar 

  9. Barnes, J. J., Lomax, R. J.: Finite-Element Methods in Semiconductor Device Simulation. IEEE Trans. Electron Devices ED-24, 1082–1089 (1977).

    Article  Google Scholar 

  10. Bozler, C. O., Alley, G. D.: Fabrication and Numerical Simulation of the Permeable Base Transistor. IEEE Trans. Electron Devices ED-27, 1128–1141 (1980).

    Google Scholar 

  11. Browne, B. T., Miller, J. J. H.: Numerical Analysis of Semiconductor Devices. Dublin: Boole Press 1979.

    Google Scholar 

  12. Browne, B. T., Miller, J. J. H.: Numerical Analysis of Semiconductor Devices and Integrated Circuits. Dublin: Boole Press 1981.

    Google Scholar 

  13. Buturla, E. M., Cottrell, P. E., Grossman, B. M., Salsburg, K. A., Lawlor, M. B., McMullen, C. T.: Three-Dimensional Finite Element Simulation of Semiconductor Devices. Proc. Int. Solid-State Circuits Conf., pp. 76–77 (1980).

    Google Scholar 

  14. Buturla, E. M., Cottrell, P. E., Grossman, B. M., Salsburg, K. A.: Finite-Element Analysis of Semiconductor Devices: The FIELDAY Program. IBM J. Res. Dev. 25, 218–231 (1981).

    Article  Google Scholar 

  15. Chamberlain, S. G., Husain, A.: Three-Dimensional Simulation of VLSI MOSFET’s. Proc. Int. Electron Devices Meeting, pp. 592–595 (1981).

    Google Scholar 

  16. Colak, S., Singer, B., Stupp, E.: Lateral DMOS Power Transistor Design. IEEE Electron Dev. Lett. EDL-1, 51–53 (1980).

    Article  Google Scholar 

  17. Cook, R. K., Frey, J.: Two-Dimensional Numerical Simulation of Energy Transport Effects in Si and GaAs MESFET’s. IEEE Trans. Electron Devices ED-29, No. 6, 970–977 (1982).

    Article  CAS  Google Scholar 

  18. DeMari, A.: An Accurate Numerical Steady-State One-Dimensional Solution of the P-N Junetion. Solid-State Electron. 11, 33–58 (1968).

    Article  Google Scholar 

  19. DeMari, A.: An Accurate Numerical One-Dimensional Solution of the P-N Junetion under Arbitrary Transient Conditions. Solid-State Electron. 11, 1021–2053 (1968).

    Article  Google Scholar 

  20. DeMeyer, K. M.: VLSI Process and Device Modeling. Katholieke Universiteit Leuven, 1983.

    Google Scholar 

  21. Dubock, P., D.C. Numerical Model for Arbitrarily Biased Bipolar Transistors in Two Dimensions. Electron. Lett. 6, 53–55 (1970).

    Article  Google Scholar 

  22. Engl, W. L., Dirks, H. K., Meinerzhagen, B.: Device Modeling. Proc. IEEE 71, No. 1, 10–33 (1983).

    Article  Google Scholar 

  23. Engl, W. L., Manck, O., Wieder, A. W.: Device Modeling. In: Process and Device Modeling for Integrated Circuit Design, pp. 3–17. Leyden: Noordhoff 1977.

    Google Scholar 

  24. Fortino, A. G., Nadan, J. S.: An Efficient Method for the Small-Signal AC Analysis of MOS Capacitors. IEEE Trans. Electron Devices ED-24, No. 9, 1137–1147 (1977).

    Article  Google Scholar 

  25. Franz, A. F., Franz, G. A., Selberherr, S., Ringhofer, C., Markowich, P.: Finite Boxes — A Generalization of the Finite Difference Method Suitable for Semiconductor Device Simulation. IEEE Trans. Electron Devices ED-30, No. 9, 1070–1082 (1983).

    Article  Google Scholar 

  26. Franz, G. A., Franz, A. F., Selberherr, S., Markowich, P.: A Quasi Three Dimensional Semiconductor Device Simulation Using Cylindrical Coordinates. Proc. NASECODE III Conf., pp. 122–127. Dublin: Boole Press 1983.

    Google Scholar 

  27. Gaur, S. P., Navon, D. H.: Two-Dimensional Carrier Flow in a Transistor Structure under Nonisothermal Conditions. IEEE Trans. Electron Devices ED-23, 50–57 (1976).

    Article  Google Scholar 

  28. Greenfield, J. A., Dutton, R. W.: Nonplanar VLSI Device Analysis Using the Solution of Poisson’s Equation. IEEE Trans. Electron Devices ED-27, 1520–1532 (1980).

    Article  Google Scholar 

  29. Gummel, H. K.: A Self-Consistent Iterative Scheme for One-Dimensional Steady State Transistor Calculations. IEEE Trans. Electron Devices ED-11, 455–465 (1964).

    Article  Google Scholar 

  30. Hachtel, G. D., Mack, M. H., O’Brien, R. R., Speelpennig, B.: Semiconductor Analysis Using Finite Elements — Part 1: Computational Aspects. IBM J. Res. Dev. 25, 232–245 (1981).

    Article  Google Scholar 

  31. Hachtel, G. D., Mack, M. H., O’Brien, R. R.: Semiconductor Analysis Using Finite Elements-Part 2: IGFET and BJT Case Studies. IBM J. Res. Dev. 25, 246–260 (1981).

    Article  Google Scholar 

  32. Heimeier, H.H.: Zweidimensionale numerische Lösung eines nichtlinearen Randwertproblems am Beispiel des Transistors im stationären Zustand. Dissertation, Technische Hochschule Aachen, 1973.

    Google Scholar 

  33. Heimeier, H. H.: A Two-Dimensional Numerical Analysis of a Silicon N-P-N Transistor. IEEE Trans. Electron Devices ED-20, 708–714 (1973).

    Article  Google Scholar 

  34. Himsworth, B.: A Computer Aided Two-Dimensional Analysis of Gallium Arsenide and Silicon Junction Field Effect Transistors. Int. J. Electronics 31, No. 4, 365–371 (1971).

    Article  CAS  Google Scholar 

  35. Hori, R., Masuda, H., Minato, O., Nishimatu, S., Sato, K., Kubo, M.: Short Channel MOS-IC Based on Accurate Two Dimensional Device Design. Jap. J. Appl. Phys. 15, 193–199 (1976).

    Article  Google Scholar 

  36. Jesshope, C. R.: Bipolar Transistor Modelling with Numerical Solutions to the 2-Dimensional DC and Transient Problems. Dissertation, University of Southampton, 1976.

    Google Scholar 

  37. Kani, K.: A Survey of Semiconductor Device Analysis in Japan. Proc. NASECODE I Conf., pp. 104–119. Dublin: Boole Press 1979.

    Google Scholar 

  38. Kataoka, S., Tateno, H., Kawashima, M.: Two-Dimensional Computer Analysis of Dielectric-Surface-Loaded GaAs Bulk Element. Electron. Lett. 6, No.6, 169–171 (1970).

    Article  CAS  Google Scholar 

  39. Kennedy, D. P., O’Brien, R. R.: Two-Dimensional Mathematical Analysis of a Planar Type Junction Field-Effect Transistor. IBM J. Res. Dev. 13, 662–614 (1969).

    Article  CAS  Google Scholar 

  40. Kennedy, D. P., O’Brien, R. R.: Two-Dimensional Analysis of JFET Structures Containing a Low-Conductivity Substrate. Electron. Lett. 7, No. 24, 714–717 (1971).

    Article  Google Scholar 

  41. Kennedy, D. P., Murley, P. C.: Steady State Mathematical Theory for the Insulated Gate Field Effect Transistor. IBM J. Res. Dev. 17, 2–12 (1973).

    Article  Google Scholar 

  42. Kilpatrick, J. A., Ryan, W. D.: Two-Dimensional Analysis of Lateral-Base Transistors. Electron. Lett. 7, No.9, 226–227 (1971).

    Article  Google Scholar 

  43. Kotani, N., Kawazu, S.: Computer Analysis of Punch-Through in MOSFET’s. Solid-State Electron. 22, 63–70 (1979).

    Article  Google Scholar 

  44. Kotani, N., Kawazu, S.: A Numerical Analysis of Avalanche Breakdown in Short-Channel MOSFET’s. Solid-State Electron. 24, 681–687 (1981).

    Article  Google Scholar 

  45. Kurata, M.: Hybrid Two-Dimensional Device Modelling. Proc. NASECODE II Conf., pp. 88–112. Dublin: Boole Press 1981.

    Google Scholar 

  46. Kurata, M.: Numerical Analysis for Semiconductor Devices. Lexington, Mass.: Lexington Press 1982.

    Google Scholar 

  47. Latif, M., Bryant, P. R.: Network Analysis Approach to Multi-Dimensional Modeling of Transistors Including Thermal Effects. Proc. Int. Symp. Circuits and Systems 1981.

    Google Scholar 

  48. Laux, S. E.: Two-Dimensional Simulation of Gallium-Arsenide MESFET’s Using the Finite-Element Method. Dissertation, University of Michigan, 1981.

    Google Scholar 

  49. Loeb, H. W., Andrew, R., Love, W.: Application of 2-Dimensional Solutions of the Shockley-Poisson Equation to Inversion-Layer M.O.S.T. Devices. Electron Lett. 4, 352–354 (1968).

    Article  Google Scholar 

  50. Machek, J., Fulop, W.: Harmonie Distortion in a One-Dimensional p-n-p Transistor. Solid-State Electron. 26, No. 6, 525–536 (1983).

    Article  Google Scholar 

  51. Manck, O., Heimeier, H. H., Engl, W. L.: High Injection in a Two-Dimensional Transistor. IEEE Trans. Electron Devices ED-21, 403–409 (1974).

    Article  Google Scholar 

  52. Manck, O.: Numerische Analyse des Schaltverhaltens eines zweidimensionalen bipolaren Transistors. Dissertation, Technische Hochschule Aachen, 1975.

    Google Scholar 

  53. Manck, O., Engl, W. L.: Two-Dimensional Computer Simulation for Switching a Bipolar Transistor Out of Saturation. IEEE Trans. Electron Devices ED-22, No. 6, 339–347 (1975).

    Article  Google Scholar 

  54. Miller, J. J. H.: Numerical Analysis of Semiconductor Devices and Integrated Circuits. Dublin: Boole Press 1983.

    Google Scholar 

  55. Mock, M. S.: A Two-Dimensional Mathematieal Model of the Insulated-Gate Field-Effect Transistor. Solid-State Electron. 16, 601–609 (1973).

    Article  Google Scholar 

  56. Mock, M. S.: A Time-Dependent Numerical Model of the Insulated-Gate Field-Effect Transistor. Solid-State Electron. 24, 959–966 (1981).

    Article  CAS  Google Scholar 

  57. Mock, M. S.: Analysis of Mathematieal Models of Semiconductor Devices. Dublin: Boole Press 1983.

    Google Scholar 

  58. Moglestue, C, Beard, S. J.: A Particle Model Simulation of Field Effect Transistors. Proc. NASECODE I Conf., pp. 232–236. Dublin: Boole Press 1979.

    Google Scholar 

  59. Moglestue, C.: A Monte-Carlo Particle Model Study of the Influence of the Doping Profiles on the Characteristics of Field-Effect Transistors. Proc. NASECODE II Conf., pp. 244–249. Dublin: Boole Press 1981.

    Google Scholar 

  60. Navon, D. H., Wang, C. T.: Numerical Modeling of Power MOSFET’s. Solid-State Electron. 26, No. 4, 287–290 (1983).

    Article  CAS  Google Scholar 

  61. Newton, A. R.: Computer-Aided Design of VLSI Circuits. Proc. IEEE 69, 1189–1199 (1981).

    Article  Google Scholar 

  62. Oh, S. Y., Ward, D. E., Dutton, R. W.: Transient Analysis of MOS Transistors. IEEE Trans. Electron Devices ED-27, 1571–1578 (1980).

    Google Scholar 

  63. Oka, H., Nishiuchi, K., Nakamura, T., Ishikawa, H.: Two-Dimensional Numerical Analysis of Normally-Off Type Buried Channel MOSFET’s. Proc. Int. Electron Devices Meeting, pp. 30–33 (1979).

    Google Scholar 

  64. Oka, H., Nishiuchi, K., Nakamura, T., Ishikawa, H.: Computer Analysis of a Short-Channel BC MOSFET. IEEE Trans. Electron Devices ED-27, 1514–1520 (1980).

    Article  Google Scholar 

  65. Pone, J. F., Castagne, R. C., Courat, J. P., Arnodo, C.: Two-Dimensional Particle Modeling of Submicrometer Gate GaAs FET’s Near Pinchoff. IEEE Trans. Electron Devices ED-29, No. 8, 1244–1255 (1982).

    Article  Google Scholar 

  66. Price, C. H.: Two-Dimensional Numerical Simulation of Semiconductor Devices. Dissertation, Stanford University, 1980.

    Google Scholar 

  67. Rahali, F.: Analyse Numerique a 2 Dimensions de Transistors MOS par la Methode des Elements Finis. Laboratoire d’electronique generale, Lausanne, 1982.

    Google Scholar 

  68. Regier, F.: A New Analysis of Field Effect Transistors. Dissertation, Yale University, 1968.

    Google Scholar 

  69. Reiser, M.: Difference Methods for the Solution of the Time-Dependent Semiconductor Flow-Equations. Electron. Lett. 7, 353–355 (1971).

    Article  Google Scholar 

  70. Reiser, M.: A Two-Dimensional Numerical FET Model for DC, AC, and Large-Signal Analysis. IEEE Trans. Electron Devices ED-20, 35–44 (1973).

    Article  Google Scholar 

  71. Schütz, A., Selberherr, S., Pötzl, H. W.: Numerical Analysis of Breakdown Phenomena in MOSFET’s. Proc. NASECODE II Conf., pp. 270–274. Dublin: Boole Press 1981.

    Google Scholar 

  72. Schütz, A.: Simulation des Lawinendurchbruchs in MOS-Transistoren. Dissertation, Technische Universität Wien, 1982.

    Google Scholar 

  73. Schütz, A., Selberherr, S., Pötzl, H. W.: A Two-Dimensional Model of the Avalanche Effect in MOS Transistors. Solid-State Electron. 25, 177–183 (1982).

    Article  Google Scholar 

  74. Schütz, A., Selberherr, S., Pötzl, H. W.: Analysis of Breakdown Phenomena in MOSFET’s. IEEE Trans. Computer-Aided-Design of Integrated Circuits CAD-1, 77–85 (1982).

    Article  Google Scholar 

  75. Scharfetter, D. L., Gummel, H. K.: Large-Signal Analysis of a Silicon Read Diode Oscillator. IEEE Trans. Electron Devices ED-16, 64–77 (1969).

    Article  Google Scholar 

  76. Schroeder, J. E., Muller, R. S.: IGFET Analysis Through Numerical Solution of Poisson’s Equation. IEEE Trans. Electron Devices ED-15, No. 12, 954–961 (1968).

    Article  Google Scholar 

  77. Selberherr, S., Fichtner, W., Pötzl, H. W.: MINIMOS — a Program Package to Facilitate MOS Device Design and Analysis. Proc. NASECODE I Conf., pp. 275–279. Dublin: Boole Press 1979.

    Google Scholar 

  78. Selberherr, S., Schütz, A., Pötzl, H. W.: MINIMOS-a Two-Dimensional MOS Transistor Analyzer. IEEE Trans. Electron Devices ED-27, 1540–1550 (1980).

    Article  Google Scholar 

  79. Selberherr, S.: Zweidimensionale Modellierung von MOS-Transistoren. Dissertation, Technische Universität Wien, 1981.

    Google Scholar 

  80. Seltz, D., Kidron, I.: A Two-Dimensional Model for the Lateral p-n-p Transistor. IEEE Trans. Electron Devices ED-21, No. 9, 587–592 (1974).

    Article  Google Scholar 

  81. Shigyo, N., Konaka, M., Dang, R. L. M.: Three-Dimensional Simulation of Inverse Narrow-Channel Effect. Electron. Lett. 18, No. 6, 114–215 (1982).

    Article  Google Scholar 

  82. Slotboom, J. W.: Iterative Scheme for 1- and 2-Dimensional D.C.-Transistor Simulation. Electron. Lett. 5, 677–678 (1969).

    Article  Google Scholar 

  83. Toyabe, T., Yamaguchi, K., Asai, S., Mock, M. S.: A Numerical Model of Avalanche Breakdown in MOSFET’s. IEEE Trans. Electron Devices ED-25, 825–832 (1978).

    Article  Google Scholar 

  84. Toyabe, T., Yamaguchi, K., Asai, S., Mock, M. S.: A Two-Dimensional Avalanche Breakdown Model of Submicron MOSFET’s. Proc. Int. Electron Devices Meeting, pp. 432–435 (1980).

    Google Scholar 

  85. Toyabe, T., Mock, M. S., Okabe, T., Ujiie, K., Nagata, M.: A Two-Dimensional Analysis of I2L with Multi-Stream Function Technique. Proc. NASECODE I Conf., pp. 290–292. Dublin: Boole Press 1979.

    Google Scholar 

  86. Van DeWiele, F., Engl, W. L., Jespers, P. G.: Process and Device Modeling for Integrated Circuit Design. Leyden: Noordhoff 1977.

    Google Scholar 

  87. Van Roosbroeck, W. V.: Theory of Flow of Electrons and Holes in Germanium and Other Semiconductors. Bell Syst. Techn. J. 29, 560–607 (1950).

    Google Scholar 

  88. Vandorpe, D., Xuong, N. H.: Mathematical 2-Dimensional Model of Semiconductor Devices. Electron. Lett. 7, 47–50 (1971).

    Article  Google Scholar 

  89. Vandorpe, D., Borel, J., Merckel, G., Saintot, P.: An Accurate Two-Dimensional Numerical Analysis of the MOS Transistor. Solid-State Electron. 15, 547–557 (1972).

    Article  CAS  Google Scholar 

  90. Wilson, C. L., Blue, J. L.: Two-Dimensional Finite Element Charge-Sheet Model of a Short Channel MOS Transistor. Solid-State Electron. 25, No. 6, 461–477 (1982).

    Article  CAS  Google Scholar 

  91. Yamaguchi, K., Toyabe, T., Kodera, H.: Two-Dimensional Analysis of Triode-Like Operation of Junction Gate FET’s. IEEE Trans. Electron Devices ED-22, 1047–1049 (1975).

    Article  Google Scholar 

  92. Yamaguchi, K., Takahashi, S.: Theoretical Characterization and High-Speed Performance Evaluation of GaAs IGFET’s. IEEE Trans. Electron Devices ED-28, No. 5, 581–587 (1981).

    Article  CAS  Google Scholar 

  93. Yamaguchi, K.: A Time Dependent and Two-Dimensional Numerical Model for MOSFET Device Operation. Solid-State Electron. 26, No. 9, 907–916 (1983).

    Article  CAS  Google Scholar 

  94. Zaluska, E. J., Dubock, P. A., Kemhadhan, H. A.: Practical 2-Dimensional Bipolar-Transistor-Analysis Algorithm. Electron. Lett. 9, 599–600 (1973).

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Rights and permissions

Reprints and permissions

Copyright information

© 1984 Springer-Verlag/Wien

About this chapter

Cite this chapter

Selberherr, S. (1984). Introduction. In: Analysis and Simulation of Semiconductor Devices. Springer, Vienna. https://doi.org/10.1007/978-3-7091-8752-4_1

Download citation

  • DOI: https://doi.org/10.1007/978-3-7091-8752-4_1

  • Publisher Name: Springer, Vienna

  • Print ISBN: 978-3-7091-8754-8

  • Online ISBN: 978-3-7091-8752-4

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics