Skip to main content
SpringerLink
Log in
Book cover

Simulation of Semiconductor Processes and Devices 1998 pp 26–29Cite as

Design Optimization of RF Power MOSFET’s Using Large Signal Analysis Device Simulation of Matching Networks

  • Conference paper

Abstract

This paper discusses the modeling and simulation of power MOSFET’s using large signal device simulation. In order to provide an accurate representation of an LDMOS MOSFET, a model for the intrinsic device and the extrinsic parasitic components is developed. The RF performance of the model is then verified with experimental data. With the proven model, the effect of parasitic components is analyzed and the matching networks are optimized for the desired response.

This is a preview of subscription content, log in via an institution.

Chapter
USD   29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD   169.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD   219.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD   219.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Learn about institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. G. Ma, W. Burger, C. Dragon, and T. Gillenwater. “High Efficiency LDMOS Power FET for Low Voltage Wireless Communications”. Proceedings of IEDM. San Francisco, CA: December 1996

    Google Scholar 

  2. A. Wood, C. Dragon, and W. Burger. “High Performance Silicon LDMOS Technology for 2GHz RF Power Amplifier Applications”. Proceeding of IEDM. San Francisco, CA: December 1996

    Google Scholar 

  3. B. Troyanovsky, F. Rotella, Z. Yu, R. Dutton, and J. Sato-Iwanga. “Large Signal Analysis of RF/ Microwave Devices with Parasitics Using Harmonic Balance Device Simulation”. SASIMI. Fukuoka, Japan: Nov. 1996

    Google Scholar 

  4. J. Cusak, S. Perlow, and B. Perlman. “Automatic Load Contour Mapping for Microwave Power Transistors”. Trans, on Microwave Theory and Techniques. Vol. MTT-22, No. 12, December 1974

    Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Center for Integrated System Stanford, Stanford University, CA, USA, 94309

    F. M. Rotella, Z. Yu & R. W. Dutton

  2. Semiconductor Products Sector, Motorola Inc, 2100 East Elliot Road, Tempe, AZ, USA, 85284

    G. Ma

Authors
  1. F. M. Rotella
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. G. Ma
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Z. Yu
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. R. W. Dutton
    View author publications

    You can also search for this author in PubMed Google Scholar

Editor information

Editors and Affiliations

  1. IMEC vzw, Leuven, Belgium

    Kristin De Meyer  & Serge Biesemans  & 

Rights and permissions

Reprints and permissions

Copyright information

© 1998 Springer-Verlag/Wien

About this paper

Cite this paper

Rotella, F.M., Ma, G., Yu, Z., Dutton, R.W. (1998). Design Optimization of RF Power MOSFET’s Using Large Signal Analysis Device Simulation of Matching Networks. In: De Meyer, K., Biesemans, S. (eds) Simulation of Semiconductor Processes and Devices 1998. Springer, Vienna. https://doi.org/10.1007/978-3-7091-6827-1_8

Download citation

  • DOI: https://doi.org/10.1007/978-3-7091-6827-1_8

  • Publisher Name: Springer, Vienna

  • Print ISBN: 978-3-7091-7415-9

  • Online ISBN: 978-3-7091-6827-1

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics

Search

Navigation