A Physics Based Resistance Model of the Overlap Regions in LDD-MOSFETs

  • E. Gondro
  • F. Schuler
  • P. Klein
Conference paper


A new resistance model for lightly doped source/drain regions featuring a nonlinear gate voltage dependence has been implemented in the Bsim3 v3 model. This is achieved by separating the LDS(D) resistance into a voltage dependent accumulation and a spreading part.


Gate Bias Resistance Model Interface State Density Electron Accumulation Source Side 


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  1. [1]
    P. Klein:A Consistent Parameter Extraction Method for Deep Submicron MOSFETs; ESSDERC Stuttgart 1997Google Scholar
  2. [2]
    H. Murrmann and D. Widmann: Current Crowding on Metal Contacts to Planar Devices; IEEE Transactions on Electron Devices 16 1969; pp. 1022–1024CrossRefGoogle Scholar
  3. [3]
    K. K. Ng and W. T. Lynch: Analysis of the Gate-Voltage-Dependent Series Resistance of MOSFET’s; IEEE Transactions on Electron Devices 33 1986; pp. 965–972CrossRefGoogle Scholar
  4. [4]
    BSIM3 Version 3.1 Manual; Department of Electrical Engineering and Computer Science Californien, USA 1997Google Scholar
  5. [5]
    G.J.Hu, C.Chang and Y. Chia: Gate-Voltage-Dependent Effective Channel Length and Series Resistance of LDD MOSFET’s; IEEE Transactions on Electron Devices 34 1987; pp. 2469–2477CrossRefGoogle Scholar

Copyright information

© Springer-Verlag/Wien 1998

Authors and Affiliations

  • E. Gondro
    • 1
  • F. Schuler
    • 1
  • P. Klein
    • 2
  1. 1.Institute of ElectronicsUniversity of BundeswehrNeubibergGermany
  2. 2.Siemens AGMunichGermany

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