Modeling Process and Transistor Variation for Circuit Performance Analysis

  • L. Gruber
  • N. Khalil
  • D. A. Bellb
  • J. Faricelli
Conference paper


In this paper, we present a comprehensive TCAD methodology for analyzing the effects of process variation on circuit functionality. We will highlight two essential features of this methodology. First, we will describe the statistical approach we have adopted for worst case file (WCF) analysis in the presence of on-chip variation (OCV). Secondly, we will summarize some key new TCAD statistical modules and analysis tools that support the statistical WCF methodology. The methodology and tools played a critical role in achieving functional first pass silicon, and the desired performance levels for the second generation of DIGITAL’S Alpha microprocessors.


Spice Model Drain Gate Capacitance Desire Performance Level Interconnect Capacitance Pass Silicon 
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Copyright information

© Springer-Verlag/Wien 1998

Authors and Affiliations

  • L. Gruber
    • 1
  • N. Khalil
    • 2
  • D. A. Bellb
    • 3
  • J. Faricelli
    • 2
  1. 1.Presently with IntelHudsonUSA
  2. 2.DigitalShrewsburyUSA
  3. 3.Presently with LucentAllentownUSA

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