Layout-Based 3D Solid Modeling of IC Structures and Interconnects Including Electrical Parameter Extraction
A suite of software tools have been developed to model IC structures including interconnects based on layout design and processing information. The modeling capabilities include 3D rendering of solid objects, surface meshing, electrical parameter (mainly capacitance) extraction for arbitrarily shaped objects. This software ensemble provides a direct link between design parameters and electrical performance. Analysis of a four transistor SRAM cell is used as an example.
KeywordsBoundary Element Method Surface Meshing Layout Design SRAM Cell Polysilicon Layer
Unable to display preview. Download preview PDF.
- Xe-Kai Hsiau, et al. “Robust, Stable, and Accurate Boundary Movement for Physical Etching and Deposition Simulation”, IEEE Transactions on Electron Devices, Vol. 44, No. 9, September 1997Google Scholar
- Zhiping Yu, “Layout Based 3D Geometric Modeling for IC”, Proceedings of International Symposium on VLSI Technology., System and Applications, pp. 108–112, June 1995Google Scholar
- R.W. Dutton, et al. “Device Simulation for RF Applications”, IEDM’97, invited paper, 1997Google Scholar