Abstract
This paper investigates an isolation and wiring scheme for a typical 700–1000V, junction isolated (JI), high voltage integrated circuit (HVIC), process. The 2-D device simulator S-PISCES2B [1] is used to simulate the behaviour of the isolation, and that of a novel wiring technique used to run high voltage wires over the isolation.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Silvaco International., S-PISCES2B User’s Manual, version 5.2, 1992.
A.F.J. Murray & W.A. Lane Proc. ESSDERC’91,Microelectronic Engineering, vol. 15, p. 377, 1991.
N. Fujishima & H. Takeda, Proc. International Symposium on Power Semiconductor Devices & I.C.’s,paper 3.3.2, p. 91, 1990.
A.W. Ludikhuize, IEEE Trans. on Electron Devices, vol. ED-38, No. 7, p. 1582, 1991.
R. Van Overstraeten & H. De Man, Solid-State Electronics,vol. 13, p. 583, 1970.
A.W. Ludikhuize, IEEE Trans. on Electron Devices, vol. ED-33, No. 12, p. 2008, 1986.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 1993 Springer-Verlag Wien
About this paper
Cite this paper
Murray, A.F.J., Lane, W.A. (1993). Simulation of a Novel Scheme for 700–1000 V Wiring Applications. In: Selberherr, S., Stippel, H., Strasser, E. (eds) Simulation of Semiconductor Devices and Processes. Springer, Vienna. https://doi.org/10.1007/978-3-7091-6657-4_87
Download citation
DOI: https://doi.org/10.1007/978-3-7091-6657-4_87
Publisher Name: Springer, Vienna
Print ISBN: 978-3-7091-7372-5
Online ISBN: 978-3-7091-6657-4
eBook Packages: Springer Book Archive