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Simulation of a Novel Scheme for 700–1000 V Wiring Applications

  • A. F. J. Murray
  • W. A. Lane

Abstract

This paper investigates an isolation and wiring scheme for a typical 700–1000V, junction isolated (JI), high voltage integrated circuit (HVIC), process. The 2-D device simulator S-PISCES2B [1] is used to simulate the behaviour of the isolation, and that of a novel wiring technique used to run high voltage wires over the isolation.

Keywords

Simulation Purpose Wire Technique Critical Electric Field Wiring Structure Field Plate 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. [1]
    Silvaco International., S-PISCES2B User’s Manual, version 5.2, 1992.Google Scholar
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    A.F.J. Murray & W.A. Lane Proc. ESSDERC’91,Microelectronic Engineering, vol. 15, p. 377, 1991.CrossRefGoogle Scholar
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    N. Fujishima & H. Takeda, Proc. International Symposium on Power Semiconductor Devices & I.C.’s,paper 3.3.2, p. 91, 1990.Google Scholar
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    A.W. Ludikhuize, IEEE Trans. on Electron Devices, vol. ED-38, No. 7, p. 1582, 1991.CrossRefGoogle Scholar
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    R. Van Overstraeten & H. De Man, Solid-State Electronics,vol. 13, p. 583, 1970.CrossRefGoogle Scholar
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    A.W. Ludikhuize, IEEE Trans. on Electron Devices, vol. ED-33, No. 12, p. 2008, 1986.CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Wien 1993

Authors and Affiliations

  • A. F. J. Murray
    • 1
  • W. A. Lane
    • 1
  1. 1.Institute of Advanced MicroelectronicsNational Microelectronics Research Centre University CollegeCorkIreland

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