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Optimization of DMOS Transistors for Smart Power Technologies by Simulation and Response Surface Methods

  • W. Kanert
  • N. Krischke
  • K. Wiesinger

Abstract

DMOS transistors for smart power technologies were investigated by extensive use of process and device simulation. For the task of simultaneously optimizing a multitude of parameters, experimental designs and response surface methods were used.

Keywords

Threshold Voltage Contour Line Breakdown Voltage Diffusion Time Response Surface Method 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

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Copyright information

© Springer-Verlag Wien 1993

Authors and Affiliations

  • W. Kanert
    • 1
  • N. Krischke
    • 1
  • K. Wiesinger
    • 2
  1. 1.Siemens AGSemiconductor GroupMünchenGermany
  2. 2.Siemens AGSemiconductor GroupVillachAustria

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