Abstract
Mechanical stress in silicon substrates caused by thin-film deposition of gate material of MOS transistors is analyzed by the finite element method. The results reveal that to predict precise stress distribution, it is very important to take into account the intrinsic stress of the thin films used as gate material as well as thermal stress.
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References
S. M. Hu, J. Appl. Phys. vol. 70, (1991), R53.
H. Miura, et al., Appl. Phys. Lett., vol. 60, No. 22, (1992), 2746.
H. Miura, et al., Proc. Int. Workshop on VLSI Process and Device Modeling, Nara, Japan, (1993), 60.
N. Saito, et al., Proc. of the Int. Conf on Computational Engineering Science, Melbourne, Australia, (1991), 880.
H. Sakata, et al., Proc. of 9th Int. Conf. on Experimental Mechanics, vol. 3, (1990), 1307.
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© 1993 Springer-Verlag Wien
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Miura, H., Saito, N., Okamoto, N. (1993). Mechanical Stress Simulation During Gate Formation of MOS Devices Considering Crystallization-Induced Stress of p-Doped Silicon Thin Films. In: Selberherr, S., Stippel, H., Strasser, E. (eds) Simulation of Semiconductor Devices and Processes. Springer, Vienna. https://doi.org/10.1007/978-3-7091-6657-4_43
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DOI: https://doi.org/10.1007/978-3-7091-6657-4_43
Publisher Name: Springer, Vienna
Print ISBN: 978-3-7091-7372-5
Online ISBN: 978-3-7091-6657-4
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