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Grid and Geometry Techniques for Multi-Layer Process Simulation

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Simulation of Semiconductor Devices and Processes

Abstract

A robust grid generation and evolution technique for process simulation is presented. A quadtree approach is used to decimate the geometry and final triangulation is performed using templates. Warping is used to improve the grid quality near boundaries. The quadtree depends only on the structure’s spatial extent and not on the specific vertices. This allows independent manipulation of the geometry and grid by various process simulation tools.

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References

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© 1993 Springer-Verlag Wien

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Sahul, Z.H., Dutton, R.W., Noell, M. (1993). Grid and Geometry Techniques for Multi-Layer Process Simulation. In: Selberherr, S., Stippel, H., Strasser, E. (eds) Simulation of Semiconductor Devices and Processes. Springer, Vienna. https://doi.org/10.1007/978-3-7091-6657-4_103

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  • DOI: https://doi.org/10.1007/978-3-7091-6657-4_103

  • Publisher Name: Springer, Vienna

  • Print ISBN: 978-3-7091-7372-5

  • Online ISBN: 978-3-7091-6657-4

  • eBook Packages: Springer Book Archive

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