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Effect of Process-Induced Mechanical Stress on Circuit Layout

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Simulation of Semiconductor Devices and Processes

Abstract

The effect of process-induced mechanical stress on characteristics of a simple differential amplifier circuit are analyzed using the finite element method, based on the piezoresistance effect of diffused resistors and the experimentally determined sensitivities of transistor characteristics to stress. The predicted change distribution of the resistivity of p-type diffused resistors and of the hfe and Vbe of pnp transistors agree well with the measured data.

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References

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Author information

Authors and Affiliations

  1. Mechanical Engineering Research Laboratory, Hitachi, Ltd., 502 Kandatsu, Tsuchiura, Ibaraki, 300, Japan

    Hideo Miura

  2. Semiconductor & Integrated Circuits Div., Hitachi, Ltd., 5-20-1 Josui-honcho, Kodaira, Tokyo, 187, Japan

    Yasunobu Tanizaki

Authors
  1. Hideo Miura
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  2. Yasunobu Tanizaki
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Editor information

Editors and Affiliations

  1. Fraunhofer-Institut für Integrierte Schaltungen, Erlangen, Federal Republic of Germany

    Heiner Ryssel  & Peter Pichler  & 

  2. Institut für Elektronische Bauelemente, Universität Erlangen-Nürnberg, Federal Republic of Germany

    Heiner Ryssel

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© 1995 Springer-Verlag Wien

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Miura, H., Tanizaki, Y. (1995). Effect of Process-Induced Mechanical Stress on Circuit Layout. In: Ryssel, H., Pichler, P. (eds) Simulation of Semiconductor Devices and Processes. Springer, Vienna. https://doi.org/10.1007/978-3-7091-6619-2_34

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  • DOI: https://doi.org/10.1007/978-3-7091-6619-2_34

  • Publisher Name: Springer, Vienna

  • Print ISBN: 978-3-7091-7363-3

  • Online ISBN: 978-3-7091-6619-2

  • eBook Packages: Springer Book Archive

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