Evolvable Hardware Chips for Neural Network Applications

  • I. Kajitani
  • M. Murakawa
  • N. Kajihara
  • M. Iwata
  • H. Sakanashi
  • T. Higuchi
Conference paper


This paper introduces two Evolvable Hardware LSIs for neural network applications. They are developed as part of MITI’s Real World Computing Project. One is self-reconfigurable neural network chip for ontogenic neural network processing, having the processing capability equivalent to 10 Pentium II chips. The other LSI is for the pattern recognition for myoelectric artificial hand control.


Neural Network Genetic Algorithm Node Function Uniform Crossover Hide Layer Node 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Wien 1999

Authors and Affiliations

  • I. Kajitani
    • 1
  • M. Murakawa
    • 2
  • N. Kajihara
    • 3
  • M. Iwata
    • 4
  • H. Sakanashi
    • 4
  • T. Higuchi
    • 4
  1. 1.University of TsukubaTenoudai, Tsukuba, IbarakiJapan
  2. 2.University of TokyoHongou, TokyoJapan
  3. 3.RWCP Adaptive Devices NEC LaboratoryKawasaki, KanagawaJapan
  4. 4.Electrotechnical LaboratoryUmezono, Tsukuba, IbarakiJapan

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