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3D Thermal Analysis for SOI and its impact on Circuit Performance

  • R. V. Joshi
  • IS. S. Kang
  • C. T. Chuang

Abstract

3D-thermal analysis for multifinger devices is developed for partially depleted SOI and Cu interconnects. Using this technique the temperature rise for multifinger devices is at least a factor of 3 higher than predicted by I-D thermal resistance models.

Also increase in temperature degrades the performance incrementally.

Keywords

Solder Bump Clock Tree Spice Model Active Finger Steady State Temperature Distribution 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. [1]
    Su, Lisa T. et. al., IEEE Transactions on Electron Devices, Vol. 41, No. 1, Jan 1994, pp. 69-75.Google Scholar
  2. [2]
    Workman, Glen O. et. al., IEEE Transactions on Electron Devices, Vol. 45, No. 1, Jan 1998, pp.125-133.Google Scholar

Copyright information

© Springer-Verlag Wien 2001

Authors and Affiliations

  • R. V. Joshi
    • 1
  • IS. S. Kang
    • 1
  • C. T. Chuang
    • 1
  1. 1.IBM RochesterT. J. Watson Res. CenterYorktown Heights

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