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Hierarchical Device Simulation

Part of the book series: Computational Microelectronics ((COMPUTATIONAL))

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Abstract

In this chapter the transport models are applied to the simulation of three different types of devices to assess the accuracy of the transport models either by comparison to each other or experimental data. In addition, the transport in the different device types is analyzed with the appropriate simulation model. The first set of devices, unipolar 1D N+NN+ and P+PP+ structures, is mainly of academic interest and is frequently investigated because of its relative simplicity (e.g. [9.1–9.6]), which reduces the CPU time and makes it easier to compare the MC model to the momentum-based models. The second group of devices consists of CMOS devices, which are the standard devices of today’s integrated circuits. With the introduction of the SiGe technology many new types of CMOS devices have appeared [9.7, 9.8]. The most important types are MOSFETs with strained Si channels [9.9–9.13]), which are investigated together with standard Si MOSFETs in the second part of this chapter. In addition, PMOSFETs with a strained SiGe channel, which have promising potential for low noise amplifiers, are discussed [9.14–9.18]. The third group of investigated devices consists of SiGe HBTs, which exhibit a superior RF and noise performance compared to standard Si BJTs [9.19–9.22].

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  1. Institut für Theoretische Elektrotechnik und Mikroelektronik, Universität Bremen, Bremen, Germany

    PD Dr.-Ing. Christoph Jungemann & Prof. Dr. Bernd Meinerzhagen

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Jungemann, C., Meinerzhagen, B. (2003). Results. In: Hierarchical Device Simulation. Computational Microelectronics. Springer, Vienna. https://doi.org/10.1007/978-3-7091-6086-2_9

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