Abstract
Electro-thermal characteristics of strained-Si MOSFETs operating in high-current, high temperature regimes were investigated using device/circuit mixed mode simulations. The material parameters of strained-Si were calibrated for device simulations. Especially the phonon mean-free-path of strained-Si with high electric fields was estimated based on a full-band Monte Carlo device simulation. Despite the low thermal conductivity of buried SiGe layers, strained-Si devices show superior Electrostatic Discharge (ESD) protection capability compared to unstrained-Si (bulkSi) devices due to the high bipolar current gain and increased impact ionization rate.
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© 2004 Springer-Verlag Wien
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Chun, JH., Choi, CH., Dutton, R.W. (2004). Electro-thermal Simulations of Strained-Si MOSFETs under ESD conditions. In: Wachutka, G., Schrag, G. (eds) Simulation of Semiconductor Processes and Devices 2004. Springer, Vienna. https://doi.org/10.1007/978-3-7091-0624-2_47
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DOI: https://doi.org/10.1007/978-3-7091-0624-2_47
Publisher Name: Springer, Vienna
Print ISBN: 978-3-7091-7212-4
Online ISBN: 978-3-7091-0624-2
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