Skip to main content

Electro-thermal Simulations of Strained-Si MOSFETs under ESD conditions

  • Conference paper
  • 610 Accesses

Abstract

Electro-thermal characteristics of strained-Si MOSFETs operating in high-current, high temperature regimes were investigated using device/circuit mixed mode simulations. The material parameters of strained-Si were calibrated for device simulations. Especially the phonon mean-free-path of strained-Si with high electric fields was estimated based on a full-band Monte Carlo device simulation. Despite the low thermal conductivity of buried SiGe layers, strained-Si devices show superior Electrostatic Discharge (ESD) protection capability compared to unstrained-Si (bulkSi) devices due to the high bipolar current gain and increased impact ionization rate.

This is a preview of subscription content, log in via an institution.

Buying options

Chapter
USD   29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD   169.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD   219.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD   219.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Learn about institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. K. Rim et al., IEEE Trans. Electron Dev., pp.1406–1415, 2000.

    Google Scholar 

  2. S. T. Huxtable et al., Applied Physics Letters, vol. 80, pp.1737–1739, 2001.

    Article  Google Scholar 

  3. A. Amerasekera et al., ISBN 0-471-49871-8, pp.17–27, 2002.

    Google Scholar 

  4. J. Goo et al., IEEE Electron Dev Letter, pp.568–570, 2003.

    Google Scholar 

  5. C. Choi et al., Nano Tech. Conf., 2004.

    Google Scholar 

  6. MEDICI: Two-Dimensional Device Simulation Program, Synopsys Inc., 2002..

    Google Scholar 

  7. Y. Ohno, IEEE Trans. Electron Dev., pp. 1889–1894, 1991.

    Google Scholar 

  8. C. Jungemann, IEICE Trans. Electronics., pp.870–879, 1999.

    Google Scholar 

  9. S. Voldman et al., EOS/ESD Sym., pp.239–250, 2000.

    Google Scholar 

  10. C. Choi et al., SISPAD, p.304, 1998.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2004 Springer-Verlag Wien

About this paper

Cite this paper

Chun, JH., Choi, CH., Dutton, R.W. (2004). Electro-thermal Simulations of Strained-Si MOSFETs under ESD conditions. In: Wachutka, G., Schrag, G. (eds) Simulation of Semiconductor Processes and Devices 2004. Springer, Vienna. https://doi.org/10.1007/978-3-7091-0624-2_47

Download citation

  • DOI: https://doi.org/10.1007/978-3-7091-0624-2_47

  • Publisher Name: Springer, Vienna

  • Print ISBN: 978-3-7091-7212-4

  • Online ISBN: 978-3-7091-0624-2

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics