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Literaturverzeichnis
Anderson, G. A. “Computer Interconnection Structures: Jensen, E. D. Taxonomy, Characteristics, and Examples” Computing Surveys, Vol. 7., No. 4, Dec. 1975
Chen, R. “Bus Communications Systems” Thesis, Computer Science Dept., Carnegie-Mellon University, Pittsburgh, Pa., January 1974
Myers, G. J. “Advances in Computer Architecture” John Wiley & Sons, New York, 1978
Kartashev, S. I. “Dynamic Architectures Problems and Solutions” Kartashev, S. P. Computer, IEEE Comp. Soc., July 78
Enslow, P. H. “What is a “Distributted” Data Processing System?” Computer, IEEE Comp. Soc., January 1978
Dijkstra, E. W. “Co-operating sequential Processes” Programming Languages, Academic Press 1968, 43–112
Steigner, Ch. “Kooperation von Mikroprozessormodulen durch Waldschmidt, K. Abbildung aller Koordinationsvektoren in einem Assoziativspeicher” GI — 7. Jahrestagung, Informatik-Fachberichte, No. 10, Springer Verlag 1977
Wiederhold, G. “Database Design”, Mc Graw-Hill Book Comp., 1977
Steigner, Ch. “ASSCO — A Solution to Mutual Exclusion and Waldschmidt, K. Deadlock Situations in a Multiprocessor System” Euromicro 1978, North-Holland Publishing Company
Steigner, Ch. “Aktivierung und Zuordnung von kooperierenden Waldschmidt, K. Prozessen im ASSKO-Mehrprozessorsystem” GI-NTG Fachtagung “Struktur und Betrieb von Rechensystemen”, Kiel, März 1980, Seite 110–123
Plunmer, W. W. “Asynchronous Arbiters” IEEE Transactions on Computers, Vol. C-21, No. 1, January 1972
Højberg, S. K. “One-Step Programmable Arbiters for Multiprocessors”, Computer Design, April 1978, S. 154–158
Isloor, S.S. “The Deadlock Problem: A Overview” Marsland, T. A. Computer, IEEE Comp. Soc., Sept. 1980
Gonzalez, Jr. “Deterministic Processor Scheduling” Computing Surv., Vol. 9, No. 3, Sept. 1977
Gonzales, M. J. “Parallel Task Execution in a Decentralized Ramamoorthy, C. V. System” IEEE Transactions on Comp., Vol. C-21, No. 12, S. 1310 – 1322
Batra, D. P. “Architectural Implications of Problem Partitioning for Distributed Processor Systems” Thesis, Northwestern University, Evanston, Illinois, 1978
Kober, R. “A Fast Communication Processor For The SMS Multimicroprocessor System” Second Symposium on Micro Architecture, Euromicro 1976, pp. 183 – 189
Coffman Jr., E. G. “On The Comparison Between Single And Multiple Kimming So Processorsystems” 7th Annual Symposium on Computer Architecture May 1980, pp. 72 – 79
Hoffmann, W. “Warteschlangenmodelle für Mehrprozessorsysteme” Kleinöder, W. GI, 9. Jahrestagung, Informatik Fachberichte No. 19, Springer Verlag 1979, pp. 503 – 514
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Waldschmidt, K., Steigner, C., Otto, C. (1981). Literaturverzeichnis. In: Untersuchung und Realisierung eines Mehrfach-Mikroprozessor-Systems durch parallele Koordination von übergeordneten Prozeßstatusvektoren in einem Assoziativspeicher. Forschungsbericht des Landes Nordrhein-Westfalen, vol 3050. VS Verlag für Sozialwissenschaften, Wiesbaden. https://doi.org/10.1007/978-3-663-19784-3_6
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DOI: https://doi.org/10.1007/978-3-663-19784-3_6
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