Abstract
In the midst of emerging technology, reversible computing is promising due to its application in the field of quantum computing. The computing hardware plays a significant role in digital signal processing (DSP) and multimedia application; one such major computing hardware is multiplier. It is a practice to choose multiplier to compute square of an operand. Multiplication hardware requires more elementary computations which leads to performance degradation in terms of reversible performance metrics like quantum cost, garbage outputs, and ancilla inputs. Ancilla inputs and garbage outputs are overhead bits in a reversible circuit. Reversible quantum computers of many qubits are extremely difficult to realize, thus we propose garbageless circuit design for reversible square computation. The proposed design methodology is based on recursion. Recursion technique is adapted from Karatsuba’s recursive method to compute square of an operand; we designed inverse computation units to retrieve the inputs and obtain garbageless circuit. On comparing proposed circuit design with existing reversible square designs and Karatsuba multiplier design, we observed that our work improves number of input lines which includes data lines and ancilla lines.
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Jayashree, H.V., Thapliyal, H., Agrawal, V.K. (2017). Efficient Circuit Design of Reversible Square. In: Gavrilova, M., Tan, C. (eds) Transactions on Computational Science XXIX. Lecture Notes in Computer Science(), vol 10220. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-662-54563-8_2
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DOI: https://doi.org/10.1007/978-3-662-54563-8_2
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