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Contact Resistance of Ge Devices

  • Zhiqiang LiEmail author
Chapter
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Part of the Springer Theses book series (Springer Theses)

Abstract

As device dimension is scaling down, the source/drain parasitic resistance Rseries makes up a growing percentage of the on-resistance (Ron = Vdd/Ion), thus it presents a larger influence on device performance [1]. However, it is very difficult to reduce Rseries in sub-100 nm MOSFETs.

Keywords

Contact Resistance Atomic Layer Deposition Parasitic Resistance Contact Resistivity Dopant Activation 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

References

  1. 1.
    Noori AM, Balseanu M, Boelen P, Cockburn A, Demuynck S, Felch S et al (2008) Manufacturable processes for <=32-nm-node CMOS enhancement by synchronous optimization of strain-engineered channel and external parasitic resistances. IEEE Trans Electron Devices 55:1259–1264ADSCrossRefGoogle Scholar
  2. 2.
    International Technology Roadmap for Semiconductors (2013) Available http://www.public.itrs.net/
  3. 3.
    Kalra P (2008) Advanced Source/drain Technologies for Nanoscale CMOS. ProQuest, Ann ArborGoogle Scholar
  4. 4.
    Kim SD, Park CM, Woo JCS (2002) Advanced model and analysis of series resistance for CMOS scaling into nanometer regime—part II: quantitative analysis. IEEE Trans Electron Devices 49:467–472ADSCrossRefGoogle Scholar
  5. 5.
    Kim SD, Park CM, Woo JCS (2002) Advanced model and analysis of series resistance for CMOS scaling into nanometer regime—part I: theoretical derivation. IEEE Trans Electron Devices 49:457–466ADSCrossRefGoogle Scholar
  6. 6.
    Oh JH, Chen Y-T, Ok I, Jeon K and Lee S-H (2010) High specific contact resistance of ohmic contacts to n-Ge source/drain and low transport characteristics of Ge nMOSFETs. In: International conference on solid state devices and materials, Japan, pp 3–20Google Scholar
  7. 7.
    Shayesteh M, Daunt CLM, O’Connell D, Djara V, White M, Long B et al (2011) NiGe contacts and junction architectures for P and As doped germanium devices. IEEE Trans Electron Devices 58:3801–3807ADSCrossRefGoogle Scholar
  8. 8.
    Chui CO, Gopalakrishnan K, Griffin PB, Plummer JD, Saraswat KC (2003) Activation and diffusion studies of ion-implanted p and n dopants in germanium. Appl Phys Lett 83:3275–3277ADSCrossRefGoogle Scholar
  9. 9.
    Brotzmann S, Bracht H (2008) Intrinsic and extrinsic diffusion of phosphorus, arsenic, and antimony in germanium. J Appl Phys 103:033508–033508-7Google Scholar
  10. 10.
    Kim J, Bedell SW, Sadana DK (2012) Multiple implantation and multiple annealing of phosphorus doped germanium to achieve n-type activation near the theoretical limit. Appl Phys Lett 101:112107ADSCrossRefGoogle Scholar
  11. 11.
    Othonos A, Christofides C, Boussey-Said J, Bisson M (1994) Raman spectroscopy and spreading resistance analysis of phosphorus implanted and annealed silicon. J Appl Phys 75:8032–8038ADSCrossRefGoogle Scholar
  12. 12.
    Schroder DK (2006) Semiconductor material and device characterization. John Wiley & SonsGoogle Scholar
  13. 13.
    Li Zhiqiang, An Xia, Yun Quanxin, Lin Meng, Li Min, Li Ming, Zhang Xing, Huang Ru (2013) Low specific contact resistivity to n-Ge and well-behaved Ge n+/p diode achieved by multiple implantation and multiple annealing technique. IEEE Electron Device Lett 34(9):1097–1099ADSCrossRefGoogle Scholar
  14. 14.
    Martens K, Firrincieli A, Rooyackers R, Vincent B, Loo R, Locorotondo S, et al (2010) Record low contact resistivity to n-type Ge for CMOS and memory applications. In: 2010 International electron devices meeting—technical digestGoogle Scholar
  15. 15.
    Raghunathan S, Krishnamohan T, Saraswat KC (2010) Novel SiGe source/drain for reduced parasitic resistance in Ge NMOS. ECS Trans 33:871–876CrossRefGoogle Scholar
  16. 16.
    Thareja G, Liang J, Chopra S, Adams B, Patil N, Cheng SL, et al (2010) High performance germanium N-MOSFET with antimony dopant activation beyond 1x10(20) cm(−3). 2010 International electron devices meeting—technical digestGoogle Scholar
  17. 17.
    Thareja G, Cheng SL, Kamins T, Saraswat K, Nishi Y (2011) Electrical characteristics of germanium n(+)/p junctions obtained using rapid thermal annealing of coimplanted P and Sb. IEEE Electron Device Lett 32:608–610ADSCrossRefGoogle Scholar
  18. 18.
    Lin J-Y, Roy AM, Saraswat KC (2012) Reduction in specific contact resistivity to Ge using interfacial layer. IEEE Electron Device Lett 33:1541–1543ADSCrossRefGoogle Scholar
  19. 19.
    Manik PP, Mishra RK, Kishore VP, Ray P, Nainani A, Huang Y-C et al (2012) Fermi-level unpinning and low resistivity in contacts to n-type Ge with a thin ZnO interfacial layer. Appl Phys Lett 101:182105ADSCrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2016

Authors and Affiliations

  1. 1.Institute of MicroelectronicsPeking UniversityBeijingChina

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