Abstract
This chapter analyzes the suitability of BLAKE for hardware implementation and surveys state-of-the-art architectures that cover a large portion of potential applications for ASIC and FPGA. Before entering into the specification of the various implementations, we introduce some basic notions of digital design and related characterization figures. The central part describes generic and application-specific architectures of BLAKE, while we conclude the chapter with a performance review of the most relevant implementation documented so far.
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© 2014 Springer-Verlag Berlin Heidelberg
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Aumasson, JP., Meier, W., Phan, R.CW., Henzen, L. (2014). BLAKE in Hardware. In: The Hash Function BLAKE. Information Security and Cryptography. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-662-44757-4_6
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DOI: https://doi.org/10.1007/978-3-662-44757-4_6
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Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-662-44756-7
Online ISBN: 978-3-662-44757-4
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