Abstract
In this paper a hybrid genetic method for processor arrays design dedicated to realization of linear algebra algorithm for banded matrices is presented. The proposed method is a modification of previous genetic algorithm which is characterized by few important advantages relative to well-known linear projection methods. The main disadvantages of this previous method are: long program runtime and problems with obtaining acceptable allocation mapping results for huge information dependency graphs. Linear projection methods don’t allow obtaining better allocation mapping solutions but are characterized by shorter program runtime. New hybrid algorithm combines these both linear and genetic methods and merges their advantages. Summarizing, this new proposed method is characterized by: a shorter program runtime, better allocation mapping results in comparison with both previous methods, possibly allocation mapping for large input linear algebra banded matrices and possibility of defining the designed processor array structure.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Peterson, M.: FPGA acceleration for outstanding performance. Challenges and opportunities. In: Parallel Processing and Applied Mathematics, Wroclaw, Poland (2009)
Kestur, S., Davis, J., Williams, O.: BLAS comparision on FPGA, CPU and GPU. In: IEEE Computer Society Symposium on VLSI, pp. 288–293 (2010)
Williams, J., George, A.D., Richardson, J., Gosrani, K., Suresh, S.: Computational density of fixed and reconfigurable multi-core devices for application acceleration. In: Proceedings of the 4th Reconfigurable Systems Summer Institute, Nat’l Center for Supercomp. App., Illinois (2008)
Chen, Y.K., Kung, S.Y.: Trend and challenge on system-on-a-chip designs. J. Signal Proc. Syst. 53, 217–229 (2008). (Springer)
Ratuszniak, P.: Processor array design with the use of genetic algorithm. In: Lirkov, I., Margenov, S., Waśniewski, J. (eds.) LSSC 2011. LNCS, vol. 7116, pp. 238–246. Springer, Heidelberg (2012)
Kung, S.Y.: VLSI Array Processors. Prentice Hall, Englewood Cliffs (1988)
Quinton, P., Robert, Y.: Systolic Algorithms and Architectures. Prentice Hall, Hertfordshire (1991)
Sergyienko A., Kaniewski, J., Maslennikow, O., Wyrzykowski, R.: A metod for mapping DSP algorithm into application specific processor. In: Proceedings of the 24th Euromicro Conference on Parallel and Distributed Processing, Vasteras, Sweden, vol. 1. IEEE Comp. Soc. Press (1998)
Fimmel, D., Merker, R.: Design of processor arrays for reconfigurable architectures. J. Supercomput. 19, 41–56 (2001). (Kluwer Academic Publishers)
Le Verge, H., Mauras, C., Quinton, P.: The ALPHA language and its use for the design arrays. J. VLSI Signal Proc. 3, 173–182 (1991)
Wilde D.K., Sie O.: Regular array synthesis using ALPHA. In: International Conference on Application Specific Array Processors (1994)
Słowik, A.: Steering of balance between exploration and exploitation properties of evolutionary algorithms - mix selection. In: Rutkowski, L., Scherer, R., Tadeusiewicz, R., Zadeh, L.A., Zurada, J.M. (eds.) ICAISC 2010, Part II. LNCS, vol. 6114, pp. 213–220. Springer, Heidelberg (2010)
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2014 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Ratuszniak, P. (2014). Hybrid Genetic Algorithm for Allocation Mapping in Processor Array Design. In: Lirkov, I., Margenov, S., Waśniewski, J. (eds) Large-Scale Scientific Computing. LSSC 2013. Lecture Notes in Computer Science(), vol 8353. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-662-43880-0_34
Download citation
DOI: https://doi.org/10.1007/978-3-662-43880-0_34
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-662-43879-4
Online ISBN: 978-3-662-43880-0
eBook Packages: Computer ScienceComputer Science (R0)