SMD Placement Using Machine Vision
VLSI allows designers to pack more circuitry onto their chips, but as chip complexity increases, so does the number of I/O lines needed to access that added complexity. To increase the number of terminations per device while maintaining the smallest mechanical package, vendors are reducing the lead spacing on surface-mount components from 0.050in. to 0.025in., and in some cases, even to 0.010in. As lead spacing shrinks, the requirements for accurate automatic devices placement become more stringent.
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