Wafer Bonding pp 359-376 | Cite as

High-Density Hybrid Integration of III–V Compound Optoelectronics with Silicon Integrated Circuits

  • E. D. Kyriakis-Bitzaros
  • G. Halkias
Part of the Springer Series in MATERIALS SCIENCE book series (SSMATERIALS, volume 75)


High-density hybrid integration of III–V compound optoelectronics (0E) with Complementary Metal Oxide Semiconductor (CMOS) Integrated Circuits (ICs) is emerging as a technology able to provide the features and performance required by the next generation of high functionality information processing subsystems [1–3]. Though the performance potential of III–V OE is widely recognized, high-density co-integration with CMOS and low-cost manufacturability remain the key issues, which will ultimately determine the potential of this technology for market penetration. A variety of approaches is currently proposed to achieve the goal of high-density III–V 0E-CMOS integration. Since there is not a single prevalent technology for the embodiment of such high-density OE subsystems, a comprehensive presentation of the state-of-the-art hybrid integration technologies of III–V OEs with CMOS is necessary to assess the potential of each approach.


GaAs Substrate Complementary Metal Oxide Semiconductor Wafer Bonding IEEE Photonic Technology Letter GaAs Wafer 
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© Springer-Verlag Berlin Heidelberg 2004

Authors and Affiliations

  • E. D. Kyriakis-Bitzaros
  • G. Halkias

There are no affiliations available

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