Abstract
Chemical-mechanical polishing (CMP) is used in integrated circuit manufacturing to remove material from patterned wafer surfaces. The term “polishing” or “planarization” is used to describe two types of processes: 1) topography reduction of surface features that result from deposition, etch, or other thin-film processes, and 2) removal (“polish back”) of films leaving material only in desired recessed regions. The later case is also called a “damascene” or “polish-back” CMP process.
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Boning, D., Hetherington, D. (2004). Patterned Wafer Effects. In: Oliver, M.R. (eds) Chemical-Mechanical Planarization of Semiconductor Materials. Springer Series in Materials Science, vol 69. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-662-06234-0_9
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