Abstract
In the past, the high-speed SRAM cache and the DRAM main memory have contributed to enhancing the performance of hierarchical memory systems (Fig. 6.1) in personal computers (PCs), workstations, servers, and so on. Recently, however, to bridge the ever-increasing speed gap between microprocessor units (MPUs) and main memories, high-speed DRAMs [6.1–6.5] such as the synchronous DRAM (SDRAM) and the Rambus DRAM have become increasingly important. These DRAMs incorporate memory subsystem technologies that memory-system designers have used to enhance not only access and cycle times, but also throughput. Here, throughput is defined as the product of bus width and frequency. The resulting high throughput of the DRAM chips has been indispensable even for PC graphics, image processing, and other multimedia applications [6.6–6.8]. In particular, high throughput is a key to high-performance graphics systems, as shown in Fig. 6.1. There are two missions for a graphics memory. One is to output data to display devices such as the cathode-ray tube (CRT). The other is to transfer drawing data to and from the video processor. Display performance has achieved 200 Mbyte/s, but the perception of the human eye is limited in terms of resolution and after-image, and therefore the high-performance requirement is getting saturated. The need for high-drawing performance, however, is increasing incessantly.
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Itoh, K. (2001). High-Performance Subsystem Memories. In: VLSI Memory Chip Design. Springer Series in Advanced Microelectronics, vol 5. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-662-04478-0_6
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DOI: https://doi.org/10.1007/978-3-662-04478-0_6
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