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Memory System Design

  • Silvia Melitta Mueller
  • Wolfgang J. Paul
Chapter

Abstract

ONE WAY to improve the performance of an architecture, is trying to increase the instruction throughput, for example by pipelining, but that calls for a fast memory system, as the analysis of section 4.6.5 has turned out.

Keywords

Cache Size Cache Line Instruction Cache Memory Interface Line Fill 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2000

Authors and Affiliations

  • Silvia Melitta Mueller
    • 1
  • Wolfgang J. Paul
    • 2
  1. 1.IBM Lab Böblingen - Dept. 3173BöblingenGermany
  2. 2.Fachbereich InformatikUniversität des SaarlandesSaarbrückenGermany

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