Content-Addressable Processors

Abstract

This last chapter is intended to show in what ways the structures of content-addressable hardware can further be developed and how CAM functions can be applied to the implementation of other than pure searching functions. In order to increase parallelism and flexibility in searching and computing operations, a few fundamental lines exist of which the following three are believed to represent the basic directions: 1) More logic functions can be added to each cell in an all-parallel CAM, and the cells can be made to intercommunicate locally, in order to distribute the processing algorithms over the memory hardware in a highly parallel manner. 2) An array processor can be built of many higher-level processing elements (e.g., microprocessors) whereby the CAM or an equivalent circuitry may be applied to define the individual control conditions and intercommunication between the processing elements. 3) The results storage of a conventional CAM array, in particular that of a word-parallel, bit-serial CAM can be made more versatile, and for the control and manipulation of the memory array as well as of the results storage, a powerful host computer can be used.