Layout Design Methods

  • Egon Hörbst
  • Christian Müller-Schloer
  • Heinz Schwärtzel


A basic idea common to all standard design procedures is, as previously explained, the preparation of reusable, prefabricated and verified circuit components [3.1]. The design expenditure for the layout is saved. And the design engineer can work at a higher abstraction level. Transistors and the technological limitations — described in terms of process technology related design rules — no longer form the design basis; rather it is logic elements such as gates, flipflops and memories. These elements are called cells. That is why standard-design procedures are also called cell-oriented design procedures.


Design Rule Standard Cell Logic Element Macro Cell Cell Library 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Literature - Chapter 3

  1. 3.1
    Trimberger, S.: Automating Chip Layout. IEEE Spectrum, June 1982.Google Scholar
  2. 3.2
    Breuer, M. A.: A Class of Min-Cut Placement Algorithms, Proc. 14th Design Automation Conf., 1977, pp. 284–290.Google Scholar
  3. 3.3
    Kernighan, B. W.; Schweikert, D. G.; Persky, G.: An Optimum Channel-Routing Algo-rithm for Polycell Layouts of Integrated Circuits, Proc. 10th Design Automation Workshop, 1973, pp. 50–59.Google Scholar
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    Yoshimura, T.; Kuh, E. S.: Efficient Algorithms for Channel Routing. IEEE Trans, on Computer-Aided Design of Integrated Circuits and Systems, Vol. CAD-1, 1982, pp. 25–35.Google Scholar
  5. 3.5
    Lauther, U.: Channelrouting in a General Cell Environment. Proc. VLSI Conf. 1985, Tokyo.Google Scholar
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    Williams, J. D.: STICKS - A New Approach to LSI Design. Masters Thesis, Massachusetts Institute of Technology, June 1977.Google Scholar
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    Williams, J. D.: STICKS - A Graphical Compiler for High-Level LSI Design. National Computer Conference, 1978.Google Scholar
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    Lopez, A. D.; Law H.-F. S.: A Dense Gate Matrix Layout Method for MOS VLSI. IEEE Journal of Solid-State Circuits, Vol. SC-15, No. 4, Aug. 1980.Google Scholar
  9. 3.9
    Law, H.-F. S.: Gate Matrix: A Practical, Stylized Approach to Symbolic Layout. VLSI Design, Sept. 1983.Google Scholar
  10. 3.10
    Lutz, W.: Softwarezellen für Datenpfadstrukturen. Diplomarbeit Technische Universität München, 1983.Google Scholar
  11. 3.11
    Johnson, S. C.: VLSI Circuit Design Reaches the Level of Architectural Description. Electronics, May 1984, p. 121.Google Scholar
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    Wallich, P.: On the Horizon: Fast Chips Quickly. IEEE Spectrum, March 1984, pp. 28–34.Google Scholar
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    Collett, R.: Silicon Compilation: A Revolution in VLSI Design. Digital Design, Aug. 1984, pp. 88–95.Google Scholar
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    Gajski, D. D.: Silicon compilers and expert systems for VLSI. Proc. 21st Design Automation Conf, 1984, pp. 86–87.Google Scholar
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    Steinberg, L. I.; Mitchell, T. M.: A knowledge based approach to VLSI CAD. The Redesign System, Proc. 21st Design Automation Conf., 1984, pp. 412–418.Google Scholar

Copyright information

© Springer-Verlag Heidelberg 1987

Authors and Affiliations

  • Egon Hörbst
    • 1
  • Christian Müller-Schloer
    • 1
  • Heinz Schwärtzel
    • 1
  1. 1.Corporate Applied Computer SciencesSiemens AGMunichGermany

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