A VLSI Chess Legal Move Generator

  • Jonathan Schaeffer
  • P. A. D. Powell
  • Jim Jonkman
Conference paper

Abstract

Constructing a chess legal move generator (LMG) illustrates the design and evaluar tion of a variety of algorithms and the problems encountered implementing them in VLSI. Software-based algorithms for LMG and their possible hardware implementations are examined. Several new approaches exploiting parallelism and systolic structure are developed. The implementations of several algorithms are compared: the space, time, complexity, and feasibility tradeoffs provide interesting insights into the development of custom-designed VLSI circuits for non-numeric applications.

Keywords

Sorting Tame Goldwater 

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. [1]
    R.P. Gurd, User’s Reference to By University of Waterloo, 1982.Google Scholar
  2. [2]
    Joe Condon and Ken Thompson, Belle Chess Hardware, Advances in Computer Chess 3, 1982, Pergammon Press, M.R.B. Clarke (ed.).Google Scholar
  3. [3]
    Andy Soltis, Four Roads to Success, Chess Life and Review, February, 1981.Google Scholar
  4. Peter Frey, (ed.). Chess Skill in Man and Machine, Springer-Verlag, 1975.Google Scholar
  5. John Mick and Jim Brick, Bit-Slice Microprocessor Design, McGraw-Hill, 1980.Google Scholar
  6. [6]
    Leonard S. Haynes, Richard L. Lau, Daniel P. Siewiorek, and Daniel Mizell, A survey of highly parallel computing. Computer 15(No. 1), January, 1982.Google Scholar
  7. [7]
    Carver Mead and Lynne Conway, Introduction to VLSI Systems, Addison-Wesley, 1980.Google Scholar
  8. [8]
    Dave Johannsen, Bristle Blocks: A Silicon Compiler, Proceedings of the 16th Design Automation Conference, 1979.Google Scholar
  9. [9]
    Uri Weiser and Al Davis, A wavefront notation tool for VLSI array design, CMU Conference on VLSI Systems and Computations, October 19–21, 1981, Computer Science Press, H.T. Kung, Bob Sproull, Guy Steel (eds.).Google Scholar
  10. [10]
    Greg Bakker, Jim Jonkman, Jonathan Schaeffer, and Tom Schultz, VLSI Implementation of a Chess Legal Move Generator, EE755S-1, University of Waterloo, August, 1982.Google Scholar

Copyright information

© Computer Science Press, Inc. 1983

Authors and Affiliations

  • Jonathan Schaeffer
    • 1
  • P. A. D. Powell
    • 1
  • Jim Jonkman
    • 1
  1. 1.VLSI Research Group, Institute for Computer ResearchUniversity of WaterlooWaterlooCanada

Personalised recommendations