Skip to main content

VLSI Applications and Testing

  • Chapter
  • 128 Accesses

Part of the book series: Springer Series in Electrophysics ((SSEP,volume 5))

Abstract

The subjects of VLSI applications and testing are far too broad to be treated thoroughly here. Fortunately, several excellent references are available. OPPENHEIM [1] is probably the best current compendium of digital signal processing applications, and each section contains an excellent list of references to the details of each application. That book contains chapters on telecommunications, audio, speech, imagery, radar, sonar, and geophysics. PRATT [2] is a valuable sourcebook on digital image processing. Enhancement, compression, and pattern recognition are all treated in considerable depth.

This is a preview of subscription content, log in via an institution.

Buying options

Chapter
USD   29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD   84.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD   109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Learn about institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. A.V. Oppenheim, Digital Signal Processing, Prentice Hall, Englewood Cliffs, N.J. (1978)

    Google Scholar 

  2. W.K. Pratt, Digital Image Processing, Wiley-Interscience, New York, (1978).

    Google Scholar 

  3. W.G. Fee, LSI Testing, Second Edition, IEEE Computer Society, New York, (1978).

    Google Scholar 

  4. M. Marshall, “Logic in Testingland — A Tale of Measurement Techniques”, EDN Magazine, (Jan, 1976).

    Google Scholar 

  5. M. Marshall, “Through the Memory Cells — Further Explorations of IC’s in Testingland”, EDN Magazine, (Feb, 1976).

    Google Scholar 

  6. M. Marshall, “Microprocessors in Testingland — The Jury Receives Its Instructions”, EDN Magazine, (Mar, 1976).

    Google Scholar 

  7. A.G. Glaser and G.E. Subak-Sharpe, Integrated Circuit Engineering, Addison Wesley, Menlo Park, CA, 746–799, (1977).

    Google Scholar 

  8. Y.S. Chen and D.L. Dutweiler, “A 35,000 Transistor Chip Echo Canceller”, Proc. 1980 International Solid State Circuits Conference, IEEE, New York, 42–43, (1980).

    Google Scholar 

  9. Y. Kawatami, et al, “A Single-Chip Digital Signal Processor for Voice-band Applications”, Proc. 1980 International Solid State Circuits Conference, IEEE, New York, 40–41, (1980).

    Google Scholar 

  10. J.R. Boddie, et al, “A Digital Signal Processor for Telecommunications Applications”, Proc. 1980 International Solid State Circuits Conference, IEEE, New York, 44–45, (1980).

    Google Scholar 

  11. R.L. Freeman, Telecommunications Transmission Handbook, John Wiley, New York, 82–130 and 448–481, (1975).

    Google Scholar 

  12. S.L. Freeny, J.F. Kaiser, and H.F. McDonald, “Some Applications of Digital Signal Processing in Telecommunications”, in Applications of Digital Signal Processing, A.V. Oppenheim, Ed., Prentice Hall, Englewood Cliffs, N.J. 1–28 (1978).

    Google Scholar 

  13. D.A. Hodges, “A Review and Projection of Semiconductor Components for Digital Storage”, Proc. IEEE, Vol. 63, No. 8, 1136–1147, (Aug, 1975).

    Google Scholar 

  14. C. Mead and L. Conway, Introduction to LSI Systems, Addision Wesley, Menlo Park, CA, 317 (1980).

    Google Scholar 

  15. J.F. Ziegler and W.A. Lanford, “The Effect of Sea Level Cosmic Rays on Electronic Devices”, Digest of Papers, 1980 International Solid State Circuits Conference, IEEE, New York 70–71, (Feb. 1980).

    Google Scholar 

  16. D.K. Pradham and J.J. Stiffler, “Error-Correcting Codes and Self-Checking Circuits, Computer, Vol. 13, No. 3, 27–37, (May 1980).

    Google Scholar 

  17. E.I. Muehldorf, “Test Pattern Generation as a Part of the Total Design Process”, Proc. 1978 Semiconductor Test Conference, IEEE Computer Society, Long Beach, CA, 4–7, (Nov, 1978).

    Google Scholar 

  18. L.H. Goldstein, “Computational Complexity/Confidence Level Tradeoffs in LSI Testing”, Proc. 1978 Semiconductor Test Conference, IEEE Computer Society, Long Beach, CA, 50–58, (Nov, 1978).

    Google Scholar 

  19. J.H. Stewart, “Application of Scan/Set for Error Detection and Diagnostics”, Proc. 1978 Semiconductor Test Conference, IEEE Computer Society, Long Beach, CA, 152–158, (Nov, 1978).

    Google Scholar 

  20. E.R. Huatek, “Semiconductor Memory Attrition Summary”, Proc. 1976 Semiconductor Test Conference, IEEE Computer Society, Long Beach, CA, 35–40, (Oct, 1976).

    Google Scholar 

  21. T.L. Palfi, “MOS Memory System Reliability”, Proc. 1975 Semiconductor Test Conference, IEEE Computer Society, Long Beach, CA, (Oct, 1975).

    Google Scholar 

  22. R.C. Foss and R. Harland, “MOS Dynamic RAM-Design for Testability, Proc. 1976 Semiconductor Test Conference, IEEE Computer Society, Long Beach, CA, 9–15, (Oct, 1976).

    Google Scholar 

  23. P. Nissen, “Some Memory Testing Paradoxes”, Proc. 1978 Semiconductor Test Conference, IEEE Computer Society, Long Beach, CA, 91–95 (Nov, 1978).

    Google Scholar 

  24. E.I. Muehldorf, “Designing LSI Logic for Testability”, Proc. 1976 Semiconductor Test Conference, IEEE Computer Society, Long Beach, CA, 45–49, (Oct, 1976).

    Google Scholar 

  25. D.W. Bray, “Partitioning for Test Generation of Large Synchronous Sequential Circuits”, Proc. 1976 Semiconductor Test Conference, IEEE Computer Society, Long Beach, CA, 50–53, (Oct, 1976).

    Google Scholar 

  26. T.W. Williams and K.P. Parker, “Testing Logic Networks and Designing for Testability”, Computer Magazine, Vol. 12, No. 10, 9–21, (Oct, 1979).

    Google Scholar 

  27. F. Hsu, P. Solecky, and L. Zobniw, “Selective Controllability: A Proposal for Testing and Diagnosis”, Proc. 1978 Semiconductor for Test Conference, IEEE Computer Society, Long Beach, CA, 170–179, (Nov, 1978).

    Google Scholar 

  28. Y.M. El-Ziq, “A New Approach for Designing Testable Combinational Networks”, Proc. 1978 Semiconductor Test Conference, IEEE Computer Society, Long Beach, CA, 103–108, (Nov, 1978).

    Google Scholar 

  29. B. Konemann, J. Mucha, and G. Zwiehoff, “Built in Logic Block Observation Techniques”, Proc. 1979 Semiconductor Test Conference, IEEE Computer Society, Long Beach, CA, 37–41, (Oct, 1979).

    Google Scholar 

  30. S. Funatsu, N. Wakatsuki, and A. Yamada, “Designing Digital Circuits with Easily Testable Considerations”, Proc. 1978 Semiconductor Test Conference, IEEE Computer Society, Long Beach, CA, 98–102, (Nov, 1978).

    Google Scholar 

  31. L.A. Stolte and N.C. Bergland, “Design for Testability of the IBM System/38”, Proc. 1979 Semiconductor Test Conference, IEEE Computer Society, Long Beach, CA, 29–36, (Oct, 1979).

    Google Scholar 

  32. H.J. Nadig, “Testing a Microprocessor Product Using a Signature Analysis”, Proc. 1978 Semiconductor Test Conference, IEEE Computer Society, Long Beach, CA, 159–169, (Nov, 1978).

    Google Scholar 

  33. H. Thaler, “Pattern Verification and Address Sensitivity of ROM’s by Signature Testing”, Proc. 1978 Semiconductor Test Conference, IEEE Computer Society, Long Beach, CA, 84–85 (Nov, 1978).

    Google Scholar 

  34. R. McCaskill, “Test Approaches for Four Bit Microprocessor Slices”, Proc. 1976 Semiconductor Test Conference, IEEE Computer Society Long Beach, CA, 22–26, (Oct, 1976).

    Google Scholar 

  35. B. C. S Liu, “Microprocessor’s Algorithmic Test Pattern Generation in the Higher Level Tester Language”, Proc. 1979 Semiconductor Test Conference, IEEE Computer Society, Long Beach, CA, 268–290, (Oct, 1979).

    Google Scholar 

Download references

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 1982 Springer-Verlag Berlin Heidelberg

About this chapter

Cite this chapter

Whalen, H.H. (1982). VLSI Applications and Testing. In: Barbe, D.F. (eds) Very Large Scale Integration (VLSI). Springer Series in Electrophysics, vol 5. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-88640-9_7

Download citation

  • DOI: https://doi.org/10.1007/978-3-642-88640-9_7

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-88642-3

  • Online ISBN: 978-3-642-88640-9

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics