Advanced Architecture and Technology of Supercomputing Systems

  • T. Watanabe
Part of the Lecture Notes in Engineering book series (LNENG, volume 69)


This paper presents a brief review of our vector and parallel processing experiences, basic hardware technologies for supercomputers and the architecture of the SX-3 Supercomputer with a vector peak speed of 22 GFlops for achieving the ultra highspeed processing. In particular, LSI and packaging technology, and the system and processor architecture of the SX-3 are described.


Multiprocessor System Fortran Compiler Control Processor Vector Instruction Current Mode Logic 
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  1. 1.
    Furukatsu, T., Watanabe, T. and Kondo, R. Supercomputer SX System with a Peak Performance of 1.3 GFlops and 6 Nanosecond Cycle Time, Nikkei Electronics, 356, pp.237–272, Nov. 9, 1984. (Japanese)Google Scholar
  2. 2.
    Watanabe, T. Design Concept for Highspeed Vector and Scalar Processing: Architecture of the NEC Supercomputer SX System, in ICCD 86, pp.38–41, Proc. of ICCD, 1986.Google Scholar
  3. 3.
    Watanabe, T. Architecture and Performance of NEC Supercomputer, Parallel Computing, 5, pp. 247–255, 1987.CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1991

Authors and Affiliations

  • T. Watanabe
    • 1
  1. 1.Computer Engineering DivisionNEC CorporationFuchu, Tokyo 183Japan

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