Fault-Tolerance in Imaging-Oriented Systolic Arrays
Image Processing often involves convolutions and Fourier Transforms (DFT and FFT): these specific operations are well implemented by means of a systolic multi-pipeline structure.
Practical implementations require large pipelines, adopting highly integrated circuits that are prone to production defects and run-time faults; efficient fault-tolerance through reconfiguration is then required.
Still, the basic problem of concurrent (or semi-concurrent) testing must be solved prior to any reconfiguration step. Here, we prove how these structures allow to perform testing by a simple technique (based on the classical LSSD method) so that added circuits required due to testing functions is kept very limited.
KeywordsFast Fourier Transform Discrete Fourier Transform Interconnection Network systoLic Array Conditioning Signal
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