General Purpose Pyramidal Architectures

  • Gerhard Fritsch
Conference paper
Part of the NATO ASI Series book series (volume 25)

Abstract

Large problem classes in natural and engineering sciences demand high computational speed and big memory space. These requirements can be satisfied by high performance multiprocessor systems with appropriate architecture such as to allow for efficient mapping of the problem structure onto the multiprocessor structure. Because of a broad variation of the computational parameters of the problems a flexible general purpose computer architecture is needed. Distribution of different functions onto the multiprocessor system such as user’s program execution, operating system functions, input/output etc. can be achieved through space-sharing. This favors hierarchically structured architectures, in particular pyramidal systems.

Keywords

Hexagonal GaAs Pyramid Geophysics Bide 

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References

  1. /1/.
    Hockney, R.W.; Eastwood, J.W.: Computer Simulation Using Particles. McGraw-Hill (1981)Google Scholar
  2. /2/.
    Rodrigue, G.; Giroux, E.D.; Pratt, M.: Large-scale Scientific Computation Computer 13,11, 65–80 (198/)Google Scholar
  3. /3/.
    Reeves, A.P.: Parallel computer architectures for image processing. Proc. 1981 Int. Conf. Parallel Processing, 199–206Google Scholar
  4. /4/.
    Dyer, Ch.R.: A VLSI pyramid machine for hierarchical parallel image processing. Proc. Conf. Pattern Recognition and Image Processing, Dallas Aug. 3–5, 1981, 381–386Google Scholar
  5. /5/.
    Kushner, T.; Wu, A.Y.; Rosenfeld, A.: Image Processing on ZMOB, IEEE Trans. Comp., Vol. C-31, No. 10, Oct. 1982, 943–951CrossRefGoogle Scholar
  6. /6/.
    Uhr, L.: Converging pyramids of arrays. IEEE Computer Soc. Workshop CAPAIDM 1981, 31–34Google Scholar
  7. /7/.
    Uhr, L.; Thompson, M.; Lackey, J: A 2-layered SIMD/MIMD parallel pyramidal “array/net”. IEEE Computer Soc. Workshop CAPAIDM 1981, 209–216Google Scholar
  8. /8/.
    Nagin, P.A.; Hanson, A.R,; Riseman, M.: Region relaxation in a parallel hierarchical architecture. In: M. Опое, K. Preston, A. Rosenfeld, Real-Time Parallel Computing Image Analysis, Plenum Press 1981Google Scholar
  9. /9/.
    Cantoni, V. and S. Levialdi: Matching the task to an image processing architecture. 6th Int. Conf. Pattern Recognition, Munich, Oct. 19–22, 1982, 254–257Google Scholar
  10. /10/.
    Cantoni, V.: Organization of multi-processor systems for image processing. In: Lect. Notes in Physics 196 (Ed. J. Becker and I. Eisele), 145–157, Springer Verlag 198UGoogle Scholar
  11. /11/.
    Fritsch, G.: Memory-coupled processor arrays for a broad spectrum of applications. In: Lect. Notes in Physics 196 (Ed. J. Becker and I. Eisele ), 158–177. Springer Verlag 1984Google Scholar
  12. /12/.
    Händler, W.; Hofmann, F.; Schneider, H.J.: A General Purpose Array with a Broad Spectrum of Applications. In: Handler, W,: Computer Architecture, Informatik Fachberichte, Springer Verlag Berlin Heidelberg New York, 4, 311–35 (1976)Google Scholar
  13. /13/.
    Hoshino, T.: Highly parallel processor array “PAX” for wide scientific applications. Proc. 1983 Int. Conf. on Parallel Processing, Aug. 23–26, 1983, 95–105Google Scholar
  14. /14/.
    Swan, R.J.; Fuller, S.H.; Siewiorek, D.P.: Cm*— A modular multi-microprocessor. AFIPS Proc. NCC, Vol. 46, 1977, 637–644Google Scholar
  15. /15/.
    Suprenum, Vorhabensbeschreibung, Gesellschaft für Mathematik und Datenverarbeitung mbH, Inst. f. Math. Grundlagen, St, Augustin/F.R. Germany, Oct. 1985Google Scholar
  16. /16/.
    Händler, W.; Herzog, U.; Hofmann, F.; Schneider, H.J.: Multiprozessoren für breite Anwendungsgebiete: Erlangen General Purpose Array. GI/NTG- Fachtagung “Architektur und Betrieb von Rechensystemen”, Informatik-Fachberichte, Springer Verlag Berlin Heidelberg New York, 78, 195–208 (1984)Google Scholar
  17. /17/.
    Fromm, H.J.; Hercksen, U.; Herzog, U.; John, K.-H.; Klar, R.; Kleinöder, W.: Experiences with Performance Measurement and Modelling of a Processor Array. IEEE-TC, C-32, 1, 15–31 (1983)Google Scholar
  18. /18/.
    Hercksen, U.; Klar, R.; Kleinöder, W. and Kneißl, F.: A method for measuring performance in a multiprocessor system. In: Proc. 1982 ACM SIGMETRICS Conf., Seattle, Wa., 77–88 (1981)Google Scholar
  19. /19/.
    Händler, W.; Rohrer, H.: Thoughts on a Computer Construction Kit. Elektronische Rechenanlagen 22, 1, 3–13 (1980)Google Scholar
  20. /20/.
    Händler, W.; Schreiber, H.; Sigmund, V.: “Computation Structures Reflected in General Purpose and Special Purpose Multi-Processor Systems”, Proc. 1979, Int. Conf. on Parallel Processing, pp. 95–102Google Scholar
  21. /21/.
    Händler, W.; Maehle, E.; Wirl, K.: DIRMU Multiprocessor Configurations, Proc. 1985 Int. Conf. on Parallel Processing, St. Charles 1985, 652–656. IEEE Comp. Soc. 1985Google Scholar
  22. /22/.
    Maehle, E.: “Fault-Tolerant DIRMU Multiprocessor Configurations”, Computer Architecture Technical Commitee Newsletter, IEEE Computer Society, 51–56, June 1985Google Scholar
  23. /23/.
    Bode, A.; Fritsch, G.; Henning, W.; Volkert, J.: High performance multiprocessor systems for numerical applications. Proc. First Int. Conf. on Supercomputing Systems, St. Petersburg/Florida, Dec. 16–20, 1985, 460–467 IEEE Comp. Soc. Press 1985Google Scholar
  24. /24/.
    Fritsch, G.; Kleinöder, W.; Linster, C.U.; Volkert, J.: EMSY85 — The Erlangen Multiprocessor System for a Broad Spectrum of Applications. Proc. 1983 Int. Conf. on Parallel Processing, 325–330 and in: Supercomputers: Design and Applications (K. Hwang, ed.), IEEE Comp. Soc. (198U)Google Scholar
  25. /25/.
    Gottlieb, A.: The NYU Ultracomputer-Designing an MIMD Shared Memory Parallel Computer, IEEE Transactions on Computers, vol. C-32, Feb. 1983, pp. 175–189Google Scholar
  26. /26/.
    Hoshino, T. et al.: PACS, a parallel microprocessor array for scientific calculations. ACM Trans, on Computer Systems 1, 3 (1983), 195–221CrossRefGoogle Scholar
  27. /27/.
    Bode, A.; Fritsch, G.; Händler, W.; Henning, W.; Hofmann, F.; Volkert, J.: Multi-Grid Oriented Computer Architecture. Proc. 1985 Int. Conf, on Parallel Processing, St. Charles 1985, 81–95. IEEE Comp. Soc. 1985 •Google Scholar
  28. /28/.
    Regenspurg, G.: Entwicklung von Zentralprozessoren aus Einheitsbausteinen. Elektron. Rechenanlagen 21 (1979), 61–64, 125–129Google Scholar
  29. /29/.
    Händler, W.: Thesen und Anmerkungen zur künftigen Rechnerentwicklung. In: Gert Regenspurg (ed.): GMD-Rechnerstruktur-Workshop, Miinchen 1980, 17–47Google Scholar
  30. /30/.
    Bode, A.; Fritsch, G.; Händler, W.; Henning, W.; Volkert, J.: A highly parallel architecture based on a distributed shared memory. Proc, Highly Parallel Computers for Num. and Signal Processing Appl. IFIP Work. Conf. WG 10.3, University of Nice/France, March 24–26, 1986Google Scholar
  31. /31/.
    Linster, C.-U.: SYMPOS/UNIX - Ein Betriebssystem fur homogene Polyprozessorsysteme. Arbeitsberichte des IMMD, Bd. 1U, Nr. 3, Erlangen 1981Google Scholar
  32. /32/.
    Bolch, G.; Hofmann, F.; Hoppe, В.; Kolb, H.J.; Linster, C.-U; Polzer, R.; Schüßler, H.W.; Wackersreuther, G.; Wurm, F.X.: A Multiprocessor System for Simulating Data Transmission Systems (MUPSI). Microprocessing and Microprogramming 12 (1983), 257–277CrossRefGoogle Scholar
  33. /33/.
    Bode, A.: Ein Mehrgitter-Gleitkomma-Zusatz für den Knotenprozessor eines Multiprozessors, In: U. Trottenberg, Wypior (eds).: Rechnerarchitekturen fur die numerische Simulation auf der Basis superschneller Lösungsverfahren I: GMD Studien Nr. 88, 153–60 (1984)Google Scholar
  34. /34/.
    Henning, W.; Volkert, J.: Programming EGPA-Systems. Proc. 5th Int. Conf. on Distributed Computing Systems, Denver, May 13–17, 1985, 552–559 IEEE Computer Society Press 1985Google Scholar
  35. /35/.
    Händler, W.: Fünfte Computer Generation und zukiinftige Rechnerstrukturen. To be published: Conference Report of “Die Zukunft der Informationssysteme”, Linz/Austria, Sept. 16–18, 1986Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1986

Authors and Affiliations

  • Gerhard Fritsch
    • 1
  1. 1.Department of Computer Science (IMMD)Universität Erlangen-NürnbergErlangenF.R. Germany

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