Silicon Implementation of Multiprocessor Pyramid Architecture
Pyramid architecture are very promising for parallel image processing . Good interprocessor communication is supported by the pyramid topology and image analysis at different resolution level is allowed. These and other advantages have stimulated the activity of several research groups and now, after theoretical studies, many of then are engaged upon the practical implementation of multiprocessor pyramid architectures. All the realizations must be based on a custom integrated circuit that realizes a defined fractional part of the pyramid.
KeywordsPower Dissipation Chip Area VLSI Circuit Programmable Logic Array Instruction Decoder
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