Abstract
This paper presents a review of computer architectures for image analysis, pattern recognition, and in particular, handwriting recognition. Emphasis is placed upon parallel architectures used in the development system environment and in embedded systems. A design philosophy and generalised parallel applications architecture for handwriting recognition are presented, based upon the characteristics of embedded real-time systems. The architecture is based upon a pipeline of tree processor farms of MIMD distributed memory processors and is fully scalable to meet throughput and latency requirements.
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© 1994 Springer-Verlag Berlin Heidelberg
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Downton, A.C. (1994). Architectures for Handwriting Recognition. In: Impedovo, S. (eds) Fundamentals in Handwriting Recognition. NATO ASI Series, vol 124. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-78646-4_23
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DOI: https://doi.org/10.1007/978-3-642-78646-4_23
Publisher Name: Springer, Berlin, Heidelberg
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